J
Jamie Morken
- Jan 1, 1970
- 0
Hi,
I was thinking about how to make a mosfet have low on state resistance
and also have low gate capacitance while not taking up too much space:
"http://www.rocketresearch.org/new/curved-mosfet/curved-mosfet.JPG"
I think this design should:
1. minimize gate capacitance by making a longer gate
(parallel capacitance)
2. minimize the on-state resistance by making a wider current path
(parallel resistance)
3. keep the area used to a minimum
Any idea if this would be any good?
cheers,
Jamie
I was thinking about how to make a mosfet have low on state resistance
and also have low gate capacitance while not taking up too much space:
"http://www.rocketresearch.org/new/curved-mosfet/curved-mosfet.JPG"
I think this design should:
1. minimize gate capacitance by making a longer gate
(parallel capacitance)
2. minimize the on-state resistance by making a wider current path
(parallel resistance)
3. keep the area used to a minimum
Any idea if this would be any good?
cheers,
Jamie