Current Mirror Disaster

[rogerk8]

Hi!

I wonder why current mirrors do not work in reality.

I have an idea though that discrete transistors have differences in Vbe.

But this is not the only part of the problem. The other part is that there seems to be some kind of thermal drift in the mirrored current. This drift is strange but I think it is due to the thermal dependency of hfe. But this is just me speculating.

I can confirm that if you connect as attached the currents can vary some 100%. But if you add a couple of small resistors in series with the emitters and Vcc then you can get some 20%. At this stage the configuration seems useful but the drift makes it kind of useless.

Generally I would recommend an offset trimmer of some +/- "0,1V" to be able to exactly set the mirrored current equal to the reference current (ir). But once again, the drift makes the configuration useless!

Current mirrors are commonly used in operational amplifiers but I do not understand how that is possible.

Best regards, Roger

 

[(*steve*)]

Are you ensuring that both transistors are in good thermal contact?

Have you tried devices with a pair of transistors on the same die?

 

[KrisBlueNZ]

The problem may be self-heating. The "output" transistor usually dissipates a lot more power than the "input" transistor, because its collector-emitter voltage is usually a lot higher so its power dissipation is a lot higher. When the transistors are next to each other on the same piece of silicon, their temperatues track pretty well, but that's not the case with discrete components.

There are lots of dual NPN and dual PNP transistors available; these will give much better results than separate discrete transistors. There are also "matched pair" dual NPNs and PNPs from Analog Devices; I don't know how much better those would be. Look on Digikey, Mouser etc.

 

[rogerk8]

Are you ensuring that both transistors are in good thermal contact?

Have you tried devices with a pair of transistors on the same die?

Hi Steve!

That seems to be the key to it all. Kind of stupid of me not to think about it. I mean the source transistor dissipates almost nothing (~70mW) while the mirror transistor dissipates some 700mW so there is obviously a difference in heat.

I have now bundled up the two BD140s while driving 100mA through the reference.

Experimenting with the emitter resistances gave (R2=R1/2, U(R1)=13V):

R1=10k (Ir=1,3mA)
U(R2)=6,22V<=>-4%
Re=2X1k (1,3V)

R1=112R (Ir=116mA)
U(R2)=6,70V<=>+3%
Re=2X5,6 (0,65V)

In both cases I have used emitter resistances equal to some 10% of R1.

It is also interesting to note that the thermal drift was short both in amplitude and time.

I would however very much like an explanation of this. How come small equal emitter resistances both stops the thermal drift and gives the mirror precision?

I can somehow see in front of me that the small part of Vbe that is changing is less with resistors than without. But how does this give the mirror precision?

Best regards, Roger
PS
Re=2X10R gave +2,4%

 

[(*steve*)]

I was going to suggest you look at the LM3046 (there are many other things similar) but your power requirements are too high,

This might be of some help.

 

[rogerk8]

I was going to suggest you look at the LM3046 (there are many other things similar) but your power requirements are too high,

This might be of some help.

Thank you Steve!

I will print out this very interesting article tomorrow.

In the meantime I want to tell you that I even want more power. I want 0,5A and I need it for my Transistor Curve Tracer project which must include power BJTs to be complete. And I have set the maximum current to 6A (remebering hfe~10 for power BJTs).

Best regards, Roger

 

[(*steve*)]

One "simple" option is to use an op-amp to compare the current through a sense resistor with another current through its own sense resistor. The op-amp controls the current through the second sense resistor.

The ratio of the resistances will determine the ratio of the currents (it's an inverse relationship)

You can add voltage dividers to allow the ratio to be variable.

 

[rogerk8]

Got this very interesting option from my swedish electronics forum.

If I'm not wrong Vcc may be applied directly to U+ of the OP giving Iref=Vcc/Re=Iout.

I am also attaching some tip I got using a Wilson current mirror instead. This sounds great in theory (mostly due to low Vce on both transistors) but obviously works badly in practice. I do however not understand why but several attempts including changing T3 twice made no sense (I got more than twice the reference current at output).

I have however not given up the Wilson Current Mirror but right not it is leaning against an OP solution instead.

Thanks for all your help!

Best regards, Roger

 

[(*steve*)]

Got this very interesting option from my swedish electronics forum.

Yeah, that's the diagram which matches my words above

Note that the left half of the circuit is essentially providing a voltage reference and the rest of the circuit is effectively a transconductance amplifier (or in other words a voltage controlled current source). In this case it is a current sink.

 

[rogerk8]

Sorry for not giving you the credit for it

This is mainly because it is easier to see and thereby understand a solution rather than reading about it.

You might be interested in this fact:

After getting a mindblowing more than 100% failure in Iout vs Iref for the excellent Wilson Current Mirror I desperatelly tried reusing "my" invention with emitter resistors (10% or 10 Ohm) again. These resistors actually gave Iout/Iref=+7% which is somewhat worse than 3% for my two transistor mirror but it actually went down from 108% to 7% with this simple approach. I could almost not believe it so I tried shorting the Re:s back and forth but it stayed stable at 7%.

While 7% (and Re:s) is a little too bad I will turn to the above OP solution instead. And yes I have understood that it is actually a transconductance amplifier (Iout/Uin). And I think it even does not need to be that complicated (omitting the strange Iref resistor and Q1).

Because, please tell me if I'm wrong, U+=U- (while the OP is working) which means that V2 will be equal to V1 at "all" times (i.e regardless of strange behaviour of Vbe2). This means that Iout=Vcc/Re2 (where I have denoted Re2 as being the rightmost resistor).

Mission accomplished

 

[rogerk8]

These are my latest attempts in designing a transistor curve tracer.

I am attaching both the old one using nonfunctional current mirrors and the new one using our suddenly invented transconductance ampifier.

Hope you will enjoy!

Best regards, Roger

 

[(*steve*)]

Sorry for not giving you the credit for it

It's not my circuit. And having a schematic is a lot better than a description in text.

Main thing is that you're being given the same advice. And you've noticed that

I could almost not believe it so I tried shorting the Re:s back and forth but it stayed stable at 7%.

Do you mind if I don't try explaining that?

And I think it even does not need to be that complicated (omitting the strange Iref resistor and Q1).

Rref/Iref (or similar) is very important in that it generates a convenient (and low) reference voltage.

Because, please tell me if I'm wrong, U+=U- (while the OP is working)

It will do while the conditions are such that the op-amp can force it to be the case. This essentially means until the voltage and/or current demanded/required of the output exceed chat the op-amp is capable of. The simple example is where the output would have to exceed Vcc. Also note that the inputs may have limits as to what voltages are permitted. If one is allowed to exceed that range, it may be that the op-amp stops doing what is required to get the other one there.

Basically, as long as you are operating within the specs, and the negative feedback loop exists, and you don't require an output the op-amp is not capable of, yes, the two inputs will track each other very closely (and can typically be said to have the same voltage)

which means that V2 will be equal to V1 at "all" times (i.e regardless of strange behaviour of Vbe2).

Well, not at all times... But when the circuit is operating correctly.

This means that Iout=Vcc/Re2 (where I have denoted Re2 as being the rightmost resistor).

Let's call the leftmost current source Iref, and the leftmost resistor Rref. Now let's call the rightmost resistor Rx and the current Ix

The voltages at both inputs will be the same, so Iref*Rref = Ix*Rx

Rearranging that, we get Ix = Iref.(Rref/Rx)

So the important thing is the ratio of the resistances to the reference current. The resistances allow you to multiply the reference by an arbitrary amount.

Now, there are practical considerations.

1) You want the loss across the resistor Rx to be small (to both minimise dissipation, but also to allow the output to get closer to ground -- I'll explain why that is important later)

2) You want to ensure that the inputs of the op-amp remain within allowable limits. Assuming you are not using a split supply for the op-amp, it needs to be one which operates with both inputs close to (or at) ground potential.

3) You need to ensure that the output does not need to exceed Vcc (or whatever the maximum output voltage is)

All these lead to Rx needing to be a low voltage, typically dropping around 0.1V to 0.7V at full load.

Because the input IRef and Rref effectively just generate a voltage Vref, there is no reason not to use a voltage source here. You might use a precision regulator (with a voltage divider to get the required voltage) or you might simply use a voltage divider from your supply voltage (assuming it is sufficiently stable).

Because Vref = Iref*Rref, the new equation for Ix is Ix = Vref/Rx

What the op-amp does (essentially) is modulate the base current to ensure that the current through the transistor is this calculated value.

The base voltage will hovver around Ix*Rx + 0.7V. The current supplied will be approximately Ix/G, where G is the gain of the transistor.

What you need to do is to ensure that the output of the op-amp is capable if the maximum voltage/current demand. If, for example, the voltage across the resistor rose so far that the output voltage would need to exceed Vcc (or the op-amp's supply voltage if they are different) then current regulation will be lost (and incidentally the two inputs would not be at the same potential)

Quite often the voltage source from which the current is drawn will be higher than the op-amp's supply voltage to allow the impedance of the load to vary more widely. However this also means a greater dissipation in Q1

Mission accomplished

You always need to be sure not to say this until it is actually true.

 

[rogerk8]

Thank you Steve for your detailed reply!

This is by the way my interface to KTT.

Take care!

Best regards, Roger

 

[rogerk8]

Hi Steve!

Your nice and detailed explanation makes me understand that I need an OP where Vcm must include ground. I think the LM324 is such an OP. Anyway, it is an OP that works with single supply (which any OP can do within restrictions) and as such points to Vcm=0V being possible.

Because looking at the above schematic, I have that problem., right?

Best regards, Roger
PS
My interface must use a "Modulo 11"-counter for 10 steps, right? Because I think that with a decade counter there will be only nine steps (but 10 states) out from the R2-R converter.

 

[(*steve*)]

Hi Steve!

Your nice and detailed explanation makes me understand that I need an OP where Vcm must include ground.

Yes, the alternatives are using a negative supply rail -- which may add complexity to your power supply, and where you will need to be careful not to reverse bias the BE junction of the output transistor (or use a mosfet), or have an op amp where Vcm includes ground *and* the output can be driven close to ground as well (it doesn't need to sink any significant current either).

I think the LM324 is such an OP. Anyway, it is an OP that works with single supply (which any OP can do within restrictions) and as such points to Vcm=0V being possible.

It looks suitable. Just ensure you can provide sufficient output current for your transistor. Alternatively, use a mosfet. If a mosfet is used, you will need a gate resistor to ensure stability. This might range between 10 and 100 ohms.

Because looking at the above schematic, I have that problem., right?

In general, having a low side current sense will always present that problem unless there's an even more negative supply rail.

My interface must use a "Modulo 11"-counter for 10 steps, right? Because I think that with a decade counter there will be only nine steps (but 10 states) out from the R2-R converter.

I assume then that you want 0, then 10 steps above that, not ten steps overall, including 0.

I think you may be able to do this with a 4017 if you use a combination of gates to take the "0" output and produce a low output when MR is asserted. This way you can get an 11th state when MR is asserted.

edit: another option is a 4 bit binary counter which is reset on reaching 11 giving states 0 to 10 - you wouldn't use an R-2R ladder with this though.

 

[rogerk8]

It looks suitable. Just ensure you can provide sufficient output current for your transistor. Alternatively, use a mosfet. If a mosfet is used, you will need a gate resistor to ensure stability. This might range between 10 and 100 ohms.

Hearing you say this two things strikes me. First, I would never have thought of using a MOSFET in this configuration. It has strangely enough never crossed my mind. Thank you! Second, BD140/139 has hfe >40. Say 50. Using this would mean that my poor OP (LM324 preliminary) would need to supply +/-10mA. And I know from experience that this is often more than most low-level OPs can deliver. This could actually be a problem while a Darlington connection with say BC546/556 would suffice. Wait a minute...-20mA<Io(LM324, 15Vcc, 25C)<10mA. But this is on the limit.

I assume then that you want 0, then 10 steps above that, not ten steps overall, including 0.

You are perfectly right. I want to be able to devide my nominally maximum 5V with ten for each step in Ug (and Ib) making the calibrated maximum Ug=0,5V/step. It will then be possible to adjust this maximum down to zero but then you have to either use the oscilloscope to view the actual maximum (due to its step property) or, which I prefere, use a 11 graded disc to linearly set anything within 0% and 100%.

Did you by the way know that a 0-10 scale disc for potentiometers are not commersially available?! So I will have to design those myself. But ain't it strange that there exist a lot of other grades including 0-9 but not 0-10. I find that fascinating

I think you may be able to do this with a 4017 if you use a combination of gates to take the "0" output and produce a low output when MR is asserted. This way you can get an 11th state when MR is asserted.

edit: another option is a 4 bit binary counter which is reset on reaching 11 giving states 0 to 10 - you wouldn't use an R-2R ladder with this though.

I haven't thought of 4017. Will contemplate (is that the right word?) this.

As you understand it is not possible to use any asyncronous set/reset of the counter because the 11th state has to be used. Using a HC163 I have come to the conclusion that you only have to decode "10" and send that to the syncronous Clear of the BCD counter which, or so I hope, will give you 11 perfect states (and thereby 10 steps).

As always, it is fun to chat with you Steve.

Thank you for all the help!

Best regards, Roger
PS
I have more problems with my CT-project. One is the variation of Vz at the Zener-diodes used within the whole spectra (some 0,1mA-0,5A) but I find this a small problem even though I've thought of using 7815-type voltage regulators instead of the 15V Zeners. Anyway the power dissipated in the Zeners are quite high (<8W) and the current drawn (<0,5A) must be supplied from my primitive supply which means that the 7815-types already sitting there will have to have coolers (3,5W) on them. There is however another way to solve this (besides switched supply) but I will not bore you with this

 

[(*steve*)]

would need to supply +/-10mA

It would only ever be sourcing current. If it begins to sink current then you have severely reverse biased the BE junction of the transistor.

This could actually be a problem while a Darlington connection.

Unlikely. If you use your original transistor with a gain of 40 and it requires a base current of 10mA, and the other transistor in the darlington has to supply that 10mA (with a gain of 100), then its base current will only be 0.1mA -- well within the range of what the op-amp can source.

contemplate (is that the right word?) this.

Perfectly!

As you understand it is not possible to use any asyncronous set/reset of the counter because the 11th state has to be used

In general, if you want to use up to state n, with a synchronous reset, you connect n to the reset. If the reset is asynchronous you connect state n+1 to the reset.

I have more problems with my CT-project. One is the variation of Vz at the Zener-diodes used within the whole spectra (some 0,1mA-0,5A) but I find this a small problem even though I've thought of using 7815-type voltage regulators instead of the 15V Zeners. Anyway the power dissipated in the Zeners are quite high (<8W) and the current drawn (<0,5A) must be supplied from my primitive supply which means that the 7815-types already sitting there will have to have coolers (3,5W) on them. There is however another way to solve this (besides switched supply) but I will not bore you with this

In general, a zener will provide a constant voltage only when the current through it is constant. As a practical matter, this can be difficult, so you generally ensure that the current through the zener stays relatively constant by having a relatively large current flow through it and drawing a relatively smaller one.

In many respects the zener behaves just like a resistor, only better. We might choose to have a 10:1 current ratio in a voltage divider (so somewhere between 90% and 100% of the current goes through the lower resistor) to get an 11% variation in output voltage.

With a zener we might have a 1.5:1 ratio (so the zener current varies between 33% and 100%) for a variation of maybe 5% in the output voltage.

Low voltage zeners (especially) have very soft knees. What this means is that their voltage drop can reduce very markedly as the current through them falls. For higher voltage zeners the knee is sharper and this effect is much reduced.

Using a zener stabilised voltage for something which draws a large and variable current is not efficient. I would be looking at a series regulator (as you have mentioned). The difference in maximum power dissipation should be zero. However the series regulator dissipates maximum power at maximum load (which probably is not frequent) while the zener regulator dissipates maximum power at minimum load (which is likely to be most of the time). As a consequence, the total system power usage is lower for series regulators where the load is variable.

 

[rogerk8]

In general, a zener will provide a constant voltage only when the current through it is constant. As a practical matter, this can be difficult, so you generally ensure that the current through the zener stays relatively constant by having a relatively large current flow through it and drawing a relatively smaller one.

I agree.

In many respects the zener behaves just like a resistor, only better. We might choose to have a 10:1 current ratio in a voltage divider (so somewhere between 90% and 100% of the current goes through the lower resistor) to get an 11% variation in output voltage.

Please explain. 10:1 current ratio in a voltage devider? Sounds strange.

With a zener we might have a 1.5:1 ratio (so the zener current varies between 33% and 100%) for a variation of maybe 5% in the output voltage.

I do not understand this either. Except for the voltage stability in spite of current change.

Low voltage zeners (especially) have very soft knees. What this means is that their voltage drop can reduce very markedly as the current through them falls. For higher voltage zeners the knee is sharper and this effect is much reduced.

This I kind of knew but not really

The difference in maximum power dissipation should be zero.

I guess you are thinking current mirrors here, or?

I think I will move towards series regulators instead and supply the system with an external +/-15V/6A power source while testing power transistors. Low power transistors will then be tested using the internally available +/-15V supply. The 15V limit is due to maximum voltage ratings of actually almost all operational amplifiers. Which makes me think about designing my KTT discretelly. Perhaps using J-FETs or Depletion MOS only, making it possible to easily switch to a Tube Curve Tracer later on. This do however not affect the current mirrors for Ib, of course.

I have by the way recently discovered that J-FETs actually are available as power transistors also (LU1014D).

Take care!

Best regards, Roger
PS
The benefit of designing with J-FETs is not only the ease of swithing to tubes, it also might make it possible to crank up the voltage. Supplying the system with +/-15V will probably not make it possible to test transistors at higher voltages than some 12V due to OPs not being able to swing more than some 2V below rail (along with Darlington Vbe loss).

 

[(*steve*)]

Please explain. 10:1 current ratio in a voltage devider? Sounds strange.

The total current flowing through the voltage divider is 10 times more than the current you are drawing from the junction of the two resistors.

So if you want 1mA, the voltage divider should have a quiescent current draw of 10mA. This will give you approximately 10% voltage regulation over the range of currents drawn.

I do not understand this either. Except for the voltage stability in spite of current change.

This means you can safely draw about 2/3 of the current that normally flows through the zener.

Both of these are rough heuristics, but you can use ohms law in the first case, and the datasheets in the latter case to get whatever you want (at the cost of dissipated power).

I guess you are thinking current mirrors here, or?

No, voltage regulators.

I was comparing the efficiency of a shunt (zener) and a series regulator

I think I will move towards series regulators instead and supply the system with an external +/-15V/6A power source while testing power transistors. Low power transistors will then be tested using the internally available +/-15V supply. The 15V limit is due to maximum voltage ratings of actually almost all operational amplifiers. Which makes me think about designing my KTT discretelly. Perhaps using J-FETs or Depletion MOS only, making it possible to easily switch to a Tube Curve Tracer later on. This do however not affect the current mirrors for Ib, of course.

Yes, as per my post, you will be using short high current pulses, so the series regulator, whilst providing no significant gain in efficiency at the maximum current, will provide vastly higher efficiency at lower currents (including all the time it sits powered up but otherwise quiescent)

I have by the way recently discovered that J-FETs actually are available as power transistors also (LU1014D).

I think you need t qualify the term "available"

PS
The benefit of designing with J-FETs is not only the ease of swithing to tubes, it also might make it possible to crank up the voltage. Supplying the system with +/-15V will probably not make it possible to test transistors at higher voltages than some 12V due to OPs not being able to swing more than some 2V below rail (along with Darlington Vbe loss).

Not sure why vacuum tubes are coming into this, but mosfets will generally provide you with what you want here, are far more readily available, and are also available in high current devices.