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Common mode choke parameters and split termination concept

Discussion in 'General Electronics Discussion' started by Akshatha Venkatesh, Jan 15, 2019.

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  1. Akshatha Venkatesh

    Akshatha Venkatesh

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    Jan 14, 2017
    1)I am trying to the understand the important parameters of a common mode choke that will be placed at the CANL and CANH lines of a transceiver.First parameter - Impedance as function of frequency - I'm looking up the impedance value at 500kHz in the graph, since my application data rate is 500kbps. Is this right ? Second parameter - Insulating resistance -How important is the insulating resistance between windings, in my understanding the more the insulating resistance is the more better the common mode choke is, is my understanding right? Also how important is stray inductance ? there is one other parameter called DC resistance(each line) given as a percentage ,could someone please explain what parameter this is ?[​IMG]

    2)This question is regarding the CAN lines termination - in split termination technique ,there is a capacitor between the resistors connected to ground. In a lot of application notes that I've read, the value is always 4.7nF for the capacitor, I'm trying to understand how this value is chosen. "EMC measurements have shown that the Split Termination is able to improve significantly the signal symmetry between CANH and CANL, thus reducing emission. Basically each of the two termination resistors is split into two resistors of equal value, i.e. two resistors of 60ohm (or 62ohm) instead of one resistor of 120ohm. The special characteristic of this approach is that the common mode signal, available at the centre tap of the termination, is terminated to ground via a capacitor. The recommended value for this capacitor is in the range of 4,7nF to 47nF" - this is from the application note AH1014 Application Hints - Standalone high speed CAN transceiver TJA1042 / TJA1043 / TJA1048 / TJA1051 How is this capacitor value quantified ? Would it be okay to use 100nF instead of 4.7nF ? I read a few more TI documents where they have calculated the corner frequency of the RC filter - 1/2*piRC , and R is taken as 30ohm, so the corner frequency for 4.7nF is 1.1Mhz. Does this mean all the noise above 1.1Mhz is cutoff , so therefore if the capacitor value is increased the cutoff frequency decreases , for 100nF - the cutoff frequency is around 50kHz. Should the data rate of CAN be considered ?the data rate is 500kbps, should the capacitor value be so selected that the cutoff frequency is above the data rate at all times ?
     
  2. Harald Kapp

    Harald Kapp Moderator Moderator

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    Nov 17, 2011
    500 kbps is equivalent to 250 kHz, not 500 kHz.
    Furthermore: the impedance of a common mode choke is ideally 0 for differential signals of any frequency and very high for common mode signals. Your CAN bus signal is differential mode. You therefore need a low impedance at around 250 kHz.
    The impedance maximum for common mode signals ideally is where the common mode signals are strongest. Unfortunately noise is very wideband, so you need to use a common mode choke with a broad range of high impedance.
    It is not uncommon to start with one choke and refine the design during the testing stage when real noise is present to optimize the noise suppression.

    Nah, insulating resistance is the resistance between the two windings. This parameter becomes mainly relevant when high voltages are involved, e.g. in a mains filter. For data line chokes it is of little importance (unless it were really bad).
    The quality of a common mode choke is defined by a low differential mode impedance versus a high common mode impedance. The core material used, the construction, the wire resistance are what counts.

    The datasheet of the choke in your schematic states DC resistance as Rmax as absolute value in mΩ, not as a percentage.

    Probably a common value that has proven to be good. In the same way as e.g. 100 nF are typically used to decouple the power supply of digital chips.
    This capacitor creates a low impedance path for AC signals to ground while blocking DC to maintain the mean voltage at this node at Vsplit. The circuit will work with 3.3 nF of 6.8 nF as well. The exact value depends on the data rate used. Read chapter 4.5.2 in this document (better yet: read the full document) for a more detailed explanation.
    No, that is way too much off from the recommended value.
     
  3. Akshatha Venkatesh

    Akshatha Venkatesh

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    0
    Jan 14, 2017
    Low impedance for differential mode at 250kHz, right ?
    May I please know what you mean when you say "unless it were really bad".
    Could you please tell me what this parameter is and how should I consider it's impact in my application ?
     
  4. Harald Kapp

    Harald Kapp Moderator Moderator

    11,794
    2,749
    Nov 17, 2011
    mainly, plus at the first few harmonics to preserve the waveform of the signal as good as possible.
    only a few kΩ I'd consider bad.
    It is, as the name says, the resistance of the choke to DC current. The current through that resistance will develop a voltage drop across it. The voltage drop needs to be small enough to allow a useable signal to pass.
     
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