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common emitter configuration- voltage divider biasing.

Discussion in 'Electronic Basics' started by Jenny, Jul 26, 2004.

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  1. Fred Stevens

    Fred Stevens Guest

    The best way to analyse the base circuit is to use the Thevenin
    equivalent circuit of the potential divider - then you will have a
    voltage source, a series resistor, the base emitter junction and a
    series emitter resistor if present. A simple application of KCL can
    then be used on the resulting loop. Additional equations are Ic =
    hFE*Ib, hfe = alpha/(1-alpha)
    and Ic = alpha*Ie. (with alpha < 1)

  2. andy

    andy Guest

    but because Ic is increasing, and all of Ic ends up as part of Ie, then
    the current through Re will increase. V=IR, so the voltage across Re will
    increase, bringing the emitter voltage closer to the base voltage, and
    reducing the current. so it will bring itself back to a new stable
    operating point, just with a higher value of Ie and Ve.
  3. Rich Grise

    Rich Grise Guest

    Ib == Ic/hfe almost by definition. Although I thought it was actually
    Ie, which of course is == Ic + Ib.

  4. Agreed, but the OP is kind of coming at this, not as a designer might, but as
    someone just trying to understand, broadly. I decided that backing into this,
    this way, might communicate the process at one level without needing to then
    also know a level above it.
    Hehe. Agreed!But then, I'm just imagining that the OP has a particular data
    sheet or transistor and is then seeing about what might be various
    considerations, given that. It's a concrete thing to imagine a single

    The whole discussion would have been just that more complex and raised to yet
    another level, had I folded in what you are suggesting. As a designer already,
    I'm sure that's easy for you -- a "been there, done that," kind of thing. But I
    imagined starting short of that broader view.
    hehe. Yes.
    Yup. Good addition. Actually, I think all this is good, by way of expanding on
    ideas. And it really helps me as a hobbyist, to see your point of view, too.
    There are many factors in BJTs that can become important, depending on the
    application, as I'm sure you know far better than I do. Over time, anyone just
    getting started on understanding will develop an 'eye' for more of these as
    applications they try teach them.

    Or where the simpler mental models basically fail you. One example of this is
    where you don't have a little r(e) model in your mind and you simply ground the
    emitter of the NPN, for example. What's the gain? You might have previously
    figured it as R(C)/R(E), but what does this mean when R(E) is zero??

    But it did help me some to start easier and roughly correct for a smaller range
    of things and then, gradually to fold in additional concepts (I'm at the
    fortunate state where I still have much more to learn, too.)
    Agreed. But I chose this route because that's the way I'd want it explained to
    me, had I no skills designing for applications but still wanted some idea about
    how to calculate things given some particular part. (And more, as a hobbyist, I
    don't always want to order a transistor for a project. I will grab my little
    box of the few I have (and in my earlier days of being a hobbyist, this was
    nothing more than sorted by NPN or PNP and otherwise all together in a place)
    and select one that seems "big enough." If I were doing a light bulb switch,
    I'd probably pick a "bigger one" and if it were a simple audio amplifier I might
    pick a smaller one but where I still may have several (so that I can consider
    doing several stages, for example.) That was about my level of thinking, then.

    One can take it in either direction. For just understanding the calculations
    though, I thought it was helpful to take it in the direction I did. But I like
    the additions you've made!
    I wanted to avoid the bigger picture, while at least giving negative feedback
    some mention so that the OP would at least trigger on the phrase in later
    reading. There is a world of beauty in understanding negative feedback from a
    variety of dimensions and eventually it becomes a good friend. Your point here
    is neatly and tersely put, yet entirely understandable from my point of view. I
    love the clear, full, yet economical of use of words. But the OP isn't even at
    my modest level of understanding, I fear, and the idea of phase shift (or even
    group delay) is probably way past the point of meaning.

    Even the idea of exactly what 'distortion' means is probably not quite there to
    the OP, yet. I tried to imply that having a gain that fluctuates as your signal
    voltage does causes it, but the OP may yet need to actually *visualize* this in
    mind before it becomes clearer. Working an NPN amplifier example with an R(E)
    that is very tiny, but taking r(e) into account for gain calculations and
    figuring the V(C) as V(B) wavers, would probably help the OP see what happens to
    the original sine shape. But this takes getting out a graph paper and plotting
    it by hand. Getting a spice program to do it for you might let you see the
    result, for example, but it's really in the calculations themselves and doing
    them by hand that really makes this clear. At least, I think so.
    Agreed, but the gain is gently sloping upwards on I(C) up to a point.
    hehe. Sometimes, it's important to state it, though. Yes?
    Just trying to list what I could off the top of my head.
    Yup. And if the OP works out the math on what happens to a sine going from base
    voltage to collector voltage, when R(E) is in the ballpark range of, say 10
    Ohms, and while taking into account r(e), then I think the point will become
    very much clearer.

    Once you see the hand-plotted results and have the calculations fresh in mind
    that you used to generate it, it sticks with you.
    I think the OP will need to start with just understanding what this distortion
    is and viscerally why it arises before getting this newer picture. The OP needs
    to hand plot this.
    Of course! I actually have a basic degenerative amp design, with the series RC
    leg (and some other topologies) parallel to R(E) and with bootstrapping, where I
    can simply set a few design parameters and let it compute the results and plot
    gain and phase over frequency, etc. I also have the basic DC amp and the
    non-bootstrapped AC amp, for comparisons.

    Natually, being a cheap-minded hobbyist, it's in LTSpice, though. Since I
    managed to scarf up a bunch of ORCAD model libraries, I've filled in for some of
    the really big lack of LTSpice, which is it's relative lack of complete,
    non-"Linear Corp" model sets.
    Thanks. I tried. But I'm also just learning, too, and have much more yet to

  5. Ah. Just looked at the page! Nice. How do you settle on the values? Is this
    a software process of simulated annealing or the slightly less complex simplex

  6. Neither. Its my own unique method. I invented it. However, its trivially
    simple, so simple that *everyone's* missed it. It *directly* calculates
    the values, essentially exactly, using the full model equations, in
    *one* spice run. It doesn't do any searching or iteration at all, other
    than the normal iterations in any spice run. However, for calculating
    BSim3 mosfet lengths and widths, there is a small error due to the
    difficulty in inverting the BSim3 equations.

    I'll probably write a little paper on the method, when I get round to

    Kevin Aylward
    SuperSpice, a very affordable Mixed-Mode
    Windows Simulator with Schematic Capture,
    Waveform Display, FFT's and Filter Design.
  7. So here, at least, you might consider using an iterative approach? Or do you
    plan on struggling further to construct a closed equation?

  8. I should add that V(BE) does vary slightly based on I(C). It's something like
    18mV for a doubling of I(C) or 60mV for a factor of 10X. This is why you can
    usually take V(BE) as a rough constant for estimating the DC operating points,
    even when using different I(C) to start out.

    JG, you might also try taking a look at the basic Ebers-Moll model for the
    transistor. I don't know of a very good web reference for this, but the book I
    use is: Modeling the Bipolar Transistor, by Ian Getreu. I've no idea why these
    books are so hard to find, but I believe they are. I got mine free within a few
    days of its publication because I was a software engineer at Tektronix at the
    time when he worked there and wrote it and they were handing them out like
    popcorn to employees who asked for it. One of the really GREAT things about
    this book is that it not only talks about the models in detail, but it also
    documents the details about where certain parameters arise and how to make
    relatively accurate measurements to derive them from a real device you might
    have in hand and where you don't want to rely only on the datasheet. I don't
    know of another book that puts all these excellent details into one place.

    The Ebers-Moll model was first described in, I think, 1954 or so and comes in
    "three flavors": injection model, transport model, and the non-linear hybrid-PI
    model. These are like different viewpoints of the same thing. For example, the
    injection model highlights the two diode currents from base to collector and
    from base to emitter while the transport model highlights the two related
    current sources between base and collector and base and emitter. The equations
    are adjusted to emphasize one preferred view or the other. There are two key
    math templates used to model each of the two junctions -- the standard equation
    you see in most texts that follows something like:

    I(C) = I(S) * exp( q*V(BE) / (k * T) - 1 )

    it's here that you see the (k*T/q) behavior I mentioned for the voltage part of
    the r(e) equation.

    But there is another, and important part, that describes the behavior of I(S)
    over temperature, and which actually winds up dominating the temperature
    behavior that might be implied by the earlier equation above:

    I(S)[T] = I(S)[nominal] * ( T / Tnominal )^3*exp( (-Eg/k)*(1/T - 1/Tnominal) )

    The EM model is only the first step. But it's a good one. Then there are
    modifications made to handle other factors that become important in some
    application areas and tend to either dominate or else materially impact the
    results in those cases. As the models grow more complex, they become usually
    more broadly applicable -- but also, often, more complex than needed for a given

  9. Joe

    Joe Guest

    Hi Jenny,

    A few months ago, I was trying to figure out the math behind common emitter
    amps and I found this site:

    If you take your time and go thru each step of the design, you will
    understand everything from the biasing to the reason for the emitter
    capacitor. They have equations that you can just into a spreadsheet and then
    enter supply voltage, collector current, frequency, beta, etc. and see the
    values that you need for your application. They also have the same info for
    common collector and common base amplifiers using NPN transistors. It's a
    good start.

  10. Not really. I can't be bothered. The error as it stands is typically
    much less than that of process variations.

    A true closed loop is probably not possible, and its a law of
    diminishing returns. Most people doing i.c design are using those
    extortionately priced Cadence stuff anyway. As I noted, for calculating
    resister values, its as accurate as any normal spice run, irrespective
    of what devices are in the circuit.

    Kevin Aylward
    SuperSpice, a very affordable Mixed-Mode
    Windows Simulator with Schematic Capture,
    Waveform Display, FFT's and Filter Design.
  11. I just looked at the site. I didn't like the way they handled the emitter
    resistor bypass. I'm no expert, of course, but I believe it's just wrong-minded
    in their topology and text. Do you see what I mean?

  12. Probably.

    The argument of making Ce small in comparison to Re is false. If one is
    going for a maximum flat gain over a set frequency range, then Ce must
    be small in comparison to re, the internal dynamic impedance, not Re the
    external resistance. If this is not done, the low frequencies will be
    attenuated compared to the mid band gain.

    In the example given, midband gain LF rolloff (-3db) is around 275hz,
    which is way to high for typical audio.

    Again, if one wants info that is going to be reasonable sound, I would
    refer to :)

    Kevin Aylward
    SuperSpice, a very affordable Mixed-Mode
    Windows Simulator with Schematic Capture,
    Waveform Display, FFT's and Filter Design.
  13. Not quite the way I'd put it. Its simply that using a C with an impedance that
    is "<<" (very much less) than R(E) at some frequency simply means it 'shorts'
    R(E). But an effectively grounded emitter means the gain is based on R(C)/r(e),
    in this case, which is not good news. The gain will be varying widely, since
    r(e) is a function of I(C). Yuk.

    And even if the impedance of C is more modest than that, such that it is
    comparable to R(E) rather than very much less and thus reduces the impact of
    r(e) to tiny proportions, it only then makes the gain highly variable on the
    frequency. Again, probably not a reasonable design.

    Two common topologies are:

    emitter emitter
    \ \
    | |
    | |
    \ +----,
    / R1 | |
    \ | |
    | | \
    | | / R4
    +----, \ \
    | | R3 / |
    | | \ |
    \ --- C1 | |
    R2 / --- | --- C2
    \ | | ---
    | | | |
    | | | |
    gnd gnd gnd gnd

    In the left case, C1 is large enough to effectively bypass R2 at some minimum
    frequency. Above that frequency (and until other parameters otherwise limit
    it), R(C)/(R1+r(e)) sets the AC gain. However, R1+R2 is what participates in
    setting the DC operating point.

    In the right case, C2 is large enough to effectively tie R4 to ground at some
    minimum frequency (just as in the left case.) Above that frequency,
    R(C)/(R3||R4+r(e)) sets the AC gain. R3 participates in setting the DC
    operating point.

    Two ways of doing the same thing. But in either case, the AC gain is roughly
    flat over a reasonable range of frequencies and, given reasonable R1 or else
    R3||R4 values, also over I(C) values.

    What I didn't like about the web site is that the C they used simply bypassed
    their emitter R, so that the transistor's emitter then went straight to ground.

    It's not a typical arrangement for audio. I'm not even sure what it would be a
    good approach for.

  14. Ian Bell

    Ian Bell Guest

    You have a design Ic, divide it by the lowest hfe for the transistor to get
    the worst case base current.
    The important thing to remember is that with an emitter resistor there is a
    dc negative feedback loop operating. Assuming the current thru the divider
    is large compared to the base current we can assume the base voltage is
    fixed. If the emitter current increases (say because of a temperature
    change) the voltage across Re will increase. As the base is held constant
    this means vbe will decrease which means Ib decreases (this is what
    determines Ib), so the emitter current will reduce.

  15. Ian Bell

    Ian Bell Guest

    I must admit I was not as impressed as I expected to be by this site.
    Talking about currents 'flapping in the wind' is hardly helpfull to
    beginners. Also stating that a transistor is a voltage operated device
    closely followed by the first transistor equation of:

    Ic = hfe * Ib

    is likely to confuse beginners.

  16. Ian Bell

    Ian Bell Guest

    Alley and Atwood is the classic Electronics text.
    Ib does not need to be something by design. The actual value of Ib in this
    circuit will vary. If you made 10 copies of this circuit then the
    variation in hfe between transistors would mean Ib would be different in
    each one. The problem with transistor design is that hfe varies over a
    wide range so the task boils down to making the circuit parameters largely
    independent of hfe. As you normally want to set a collector current this
    means making the circuit parameters largely independent of Ib. A divider
    provides a way to provide a bias voltage to the transistor but if it is not
    to be affected by Ib its current must be large compared to Ib.

  17. Ian Bell

    Ian Bell Guest

    Depends on what you are trying to achieve. For a small signal amplifier you
    might want to choose a value that gives low noise for example. However, in
    all cases you need to think about the load this circuit will drive into.
    To a very simple first approximation, the output impedance of the CE
    circuit is its collector resistance. Not much good choosing a 1K collector
    resistance if you want to drive a 100R load.

  18. Joe

    Joe Guest

    Hi Jon,

    Well, not really, but then I am no expert either. I understand the need for
    an emitter bypass cap, and, having a background in physics, I like using
    equations to design these amplifiers with. It makes it much simpler for me.
    When I put the right values together on the breadboard, I know the design
    will work. I have problems figuring out what the load is going to be if it
    is another transistor (ie 2nd stage) to determine the output cap. Can you
    elaborate a little more on what you are not comfortable with?

  19. I mentioned this, after a fashion.
    Yup. But then you are getting into another area. There is a whole other thing
    to learn in understanding input and output impedances and their whys and
    wherefores. I thought I'd hold short of getting into that.

  20. Yes, I already did in my response to Kevin. Did I make sense?

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