Common Base Biasing

[Warren]

I am curious about common base configuration biasing. When
using a _split_ supply, how are the emitter and collector
resistors chosen?


VCC
+
|
.-.
| |
| | RC
'-'
|| | ||
-----||-------|----- --------------||-----
|| | ^ / ||
| ---
.-. |
RE | | |
| | ===
'-' GND
|
-
VEE

1) I assume that you start with a desired Ic current.

2) Given that the base is DC grounded (in this example at
least), then it follows that the top of RE is -0.6V.

3) So I assume that you compute RE = (VEE-0.6) / Ic.

It appears that the collector can only swing between near
ground and +VCC, so I would assume you target VC at VCC / 2.

4) Hence Rc = (VCC / 2) / Ic.

Is that the overall procedure?

I know you can also arrange it so the base is only AC
grounded, which then allows greater flexibility for choosing
input/output impedances, not to mention output swing. But you
often see this configuration listed as an example.

 

[Warren]

Phil Hobbs expounded in

Yes, that's more or less it. As you say, there are usually
other considerations, notably input impedance, bandwidth,
and power dissipation. If the source has a lot of shunt
capacitance, the layout is crappy or the transistor is
really fast, you might need a base resistor to suppress
oscillation.

Cheers

Phil Hobbs

Thanks Phil. I think I'm finally getting a handle on this,
after all these years.

Reading Ch 2 of the Art of Electronics made the BJT biasing of
emitter follower, common emitter (and implicitly) common
collector configuration biasing easy. I only wish I had known
that 30+ years ago.

Everything else I've ever read seemed to make it so
complicated with h-parameters etc. Finally some common sense
prevails for a simple guy like me.

Warren

 

[Jamie]

I am curious about common base configuration biasing. When
using a _split_ supply, how are the emitter and collector
resistors chosen?


VCC
+
|
.-.
| |
| | RC
'-'
|| | ||
-----||-------|----- --------------||-----
|| | ^ / ||
| ---
.-. |
RE | | |
| | ===
'-' GND
|
-
VEE

1) I assume that you start with a desired Ic current.

2) Given that the base is DC grounded (in this example at
least), then it follows that the top of RE is -0.6V.

3) So I assume that you compute RE = (VEE-0.6) / Ic.

It appears that the collector can only swing between near
ground and +VCC, so I would assume you target VC at VCC / 2.

4) Hence Rc = (VCC / 2) / Ic.

Is that the overall procedure?

I know you can also arrange it so the base is only AC
grounded, which then allows greater flexibility for choosing
input/output impedances, not to mention output swing. But you
often see this configuration listed as an example.

That looks good, I always look at that type of config as voltage
divide with a little loss to it. They are good how ever at
converting and semi isolation of signals.

Jamie.

 

[josephkk]

Phil Hobbs expounded in



Thanks Phil. I think I'm finally getting a handle on this,
after all these years.

Reading Ch 2 of the Art of Electronics made the BJT biasing of
emitter follower, common emitter (and implicitly) common
collector configuration biasing easy. I only wish I had known
that 30+ years ago.

Everything else I've ever read seemed to make it so
complicated with h-parameters etc. Finally some common sense
prevails for a simple guy like me.

Warren

Yikes. Trying to learn how to bias a transistor with the h-paramter black
box model? Crikey, that was made artificially difficult. Must have been
the only thing the prof understood.

I learned bjt bias with the simplified-t model, then moved to the
hybrid-pi model.

The two-port h-parameter and a, y, and z equivalents are to be used at the
next higher level, for chains of amplifier / filter stages.