CMOS var. sinewave gen

I have been scouring the web for a digital sinewave generator that
will do 1-50Hz, either with a programmable divide down chain, or a
linear pot.

Most of the successful designs now seem to use dedicated IC's or
SCF's. I would prefer something with common CMOS parts and a two pole
LP passive flter ... and without having to manually switch capacitors.

I can live with a bit of distortion, but was thinking it might be
minimized by using a staircase approach. Perhaps this is inherently
easier to smooth/filter. Or maybe generating a triangle wave would
facilitate filtering in some way.

Can anyone offer a few suggestions as to the best design options for
this project?

Much thanks,

Norman

 

You could synthisize the sinewave by doing the following.

1. Use a PC computer to compute a sinewave table

Definition
---------------
Num is number of samples say = 255 samples
Let use 8bit binary to repesent sinewave value
Data_val is unsign character array (a byte array)

Compute sinewave table values
For i = 0 to Num
Data_val = round (128 * sine (2 * pi * (i/Num)))
Next i

2.
Place the Data_val [] values in to a parallel Flash or EPROM

3. Connect the 8bit data lines to a DAC or simple R-2R ladder network for
the sinwave output.

4. Clock the address lines of the EPROM with a CMOS 4040 binary ripple
counter


Oh ! Here's an article

http://www.elecdesign.com/Articles/Print.cfm?ArticleID=4995


Regards
Joe

 

"Norm Obrien"

** Really ?

What sort of project can use two such widely disparate methods ?

** Then go design it.

** It does.

Means only a diode network can convert it to a sine wave.

Look up "function generator " IC's

** For a secret project you will not even outline ?

Not me.



........ Phil

 

just speculating here -- the R/2R dac (resistor ladder) might be useful...
what if you scaled the resistors so the higher bits gave less contribution
to the output, causing the output to "round over" as it approached peak ??
Drive the ladder with an up/down counter setup to reverse when it hits top
or bottom. Filter the output with a 50hz low pass filter to clean up any
left over glitchies

You can get any desired accuracy you want by scaling the number of bits in
the counter (and the size of the ladder)

Would take a little work to figure out the resistor values to use -- but I
think its workable !!

http://en.wikipedia.org/wiki/Resistor_Ladder

 

poti -> 4046 VCO -> 4040 counter -> 2716 EPROM with sinewave table -> 8bits DA -> lowpass RC filter -> amplifier -> speaker -> ear -> brain -> other ear -> air

 

I am doing some research in digital frequency synthesizer(generator
also),using verilog language , design a frequency generaor with linear
frequency modulation,....about ditigtal IC , but not design the part
of DAC

 

For these low frequencies the DAC can probably be made in FPGA with PWM
followed by a simple RC lowpass.
There was some discussion about good DA FPGA circuits in comp.arch.fpga.
A FPGA can hold a sine table in internal RAM.
Then the question is to make a controlled freq source.....
For low frequencies you could just count clock pulses.
Say 1Hz to 20kHz, and 256 steps per sinewave gives a maximum 5.12 MHz clock.
Making it sweep that wide seems more difficult to me.


Personally I'd use a PIC, there is sinewave code on the Microchip site, document:
DTMF tone generation using PIC16C74
Written for the "Digital Signal Processing Using the PIC16C74" Ap Note.
Generates 16 DTMF tones (1-9,0,*,#,A,B,C,D) out PWM port 1
So a one chip low power solution.
Probably 00616.zip and 00616.pdf on their site.

 

Analog Devices makes nice DDS chips.

John

 

Your requirements do not specify signal amplitude, stability or
distortion, but have a look at the following, it might be useful
given your specification of a common CMOS part.

"Inverters form three-phase VCO"
Al Dutcher, AL Labs,West Deptford, NJ
EDN Design Ideas August 2, 2001
http://www.edn.com/article/CA149120.html?spacedesc=designideas&industryid=44217
Circuit diagram is a bit broken.
No dots on inverters and transistor base disconected.
Try connect transistor base to node between 680 resistor and 50K pot.
Pin 7 Vss connected to 0V or gnd.
The graph shows symmetrical swing but that is wrong.
You could fix the offset using some of the ideas from the
enhanced circuit.
You can also try the 4069UB instead of the 74HCU04

"Enhanced three-phase VCO features ground-referenced outputs"
Harry Bissell Jr, Welding Technology Corp, Farmington Hills, MI
EDN Design Ideas January, 19 2006, pp80
http://www.edn.com/contents/images/6298270.pdf

I haven't tried the circuits and have a number of issues
with the basic design, but it might be what you are looking for.
I would rather us a micro for the job.
If forced to do a non micro design I will also do the
EPROM/EEPROM/FLASH design suggested by others.

Gerhard van den Berg
CSIR

 

Win Hill or one of the Johns has published a circuit that does something
like this, but it uses a Johnson counter, and it's not a resistor ladder,
just a summer.

Maybe someone will post a link.

Good Luck!
Rich

 

I s'pose the trick is in knowing what words to search on. Adding
"1-50Hz" would limit your search to nothing.
The mention of 'or a pot' also implies you crave simplicity without
the tricky auto amplitude control complications needed for classic
sine oscillators.
This subject turns up often. Search this group for "digital sine
wave".
Also:

http://www.epanorama.net/schematicsforfree/Test_equipment/Generators/index.php

has a handy "Digital sine wave generation.pdf". This is a collection
of magazine articles showing the usual method of generating sines
using standard CMOS chips and resistors.

 

For these low frequencies you might want to consider a micro as DDS.
E.g. http://www.myplace.nu/avr/minidds/index.htm

Joop