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cmos inverter

Discussion in 'General Electronics Discussion' started by vead, Apr 26, 2014.

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  1. vead


    Nov 27, 2011
    what should be good characteristic for cmos circuit
    1)It should be dissipate less power
    2)should have noise immunity
    3)rise time and fall time should be less
    does anyone know another specification ?
  2. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

    Jan 21, 2010
    Compared to what? TTL? ECL? RTL?
  3. vead


    Nov 27, 2011
    I want to know how cmos designer decide what specification is need to make good cmos Inverter so I Think
    1)It should be dissipate less power
    2)should have noise immunity
    3)rise time and fall time should be less
    how to select another specification for cmos inverter ?
  4. vead


    Nov 27, 2011
    I need some query about cmos circuit
    I am reading about cmos circuit, I wonder how designer think when they design new chip

    cmos circuit specification
    Input voltage
    output voltage
    input current
    output current
    transistor width
    transistor length
    fall time
    raise time

    - they determine the requirement of customer
    answer- less delay, low power consumption, low voltage

    ( i made temporary specification for cmos inverter )
    Input voltage 3.3 v
    output voltage 3.0 v
    input current 1.5 micro amp
    output current 1.0 micro amp
    transistor width 6 micron
    transistor length 2 micron
    fall time 2 ns
    raise time 3 ns

    how designer decide specification
    I mean how they make chip that work fine
    I just want to know how does designer think ,
  5. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

    Jan 21, 2010
    Unfortunately your specs for an inverter would produce a largely useless device. The inverters output would be insufficient to drive even a single input.

    What you are defining is an incomplete set of input and output specs for a logic family. These would normally include 4 voltages for inputs and 4 for outputs defining the limits on valid voltages for a logic high and low. The inputs will typically accept a wider range than the outputs will produce.

    Then you would specify an output that was capable of significant fan- out. In some logic families, fan-in can also be valid.

    Then there's a plethora of other things including rise and fall times (perhaps min and max), propagation delay, power supply specs and thermal considerations.

    None of that will define a perfect inverter. For a particular family, the spec will consist primarily of the relationship between the input and the output logic states. Perhaps the perfect inverter will meet the tightest end of all specs where there is a range, and well exceed the minimum where there is just a minimum spec (and similarly, but opposite, for those which just have a maximum).

    Will that be the perfect inverter? No. A perfect inverter would be the first choice every time you wanted an inverter. Such a beast does not exist. For example you might want open drain or complementary outputs -- you cant have both. Or you might want the ability to source and sink a large current, or you might want a current limited output. a gain you can't have both. You might want to interface with ECL and such a requirement would seriously impact noise immunity if you also wanted to interface with CMOS. Maybe you want to drive long lines, with minimal crosstalk. This would impose limitations which would conflict with the ability to have a very small rise and fall time.

    You may have an easier time describing a "perfect" woman.
  6. Harald Kapp

    Harald Kapp Moderator Moderator

    Nov 17, 2011
    Steve, you know very well that there aint no such thing as a "perfect woman" ;)
  7. LvW


    Apr 12, 2014
    But can we describe (define) a "perfect woman"?
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