clock generator

[jason]

Hello All

Anyone can share the idea of designer a clock generator using cmos PLL
technology?
Do share with me any good link or material on this topic from basics to
advanced level.
Thank you

rgds and thanks
Jason

 

[John Fields]

Hello All

Anyone can share the idea of designer a clock generator using cmos PLL
technology?
Do share with me any good link or material on this topic from basics to
advanced level.
Thank you

 

[Boki]

Clock generator => VCO => PLL

inverse?

I don't understand...

Best regards,
Boki.

 

[jason]

Hi All

It is a kind of clock generator that make use of PLL or DPLL(mixture
ofanalog and digital circuit) . The aim is to investigate the jitter
and also skew when load , temperature and power supply is varying,
Anyone know of such a reference?
Kindly help

thank you
jason

 

[Boki]

so you have to inverse it to see that?
Still not understand..

Best regards,
Boki.