cld do with some help with 3rd/5th overtone crystal oscilators

[Tim Wescott]

sorry if this sort of subject has been covered here a lot but cant seem to
find what info i need ..

1) is there a way to get a cmos inverter xtal oscilator to 3rd overtone
without using an inductor? i tried a rc filter to the input of the crystal
but it wld oscilate at fundemental or not at all. the inductors seem to be
cuasing some jitter from vibration/interference. and what about 5th overtone
too ?

I doubt it. You really need to start with an circuit that wants to
oscillate at the overtone frequency, then put the crystal in.

I'd only use a CMOS inverter with a 3rd overtone with a lot of
qualification work -- I think you'll get better reliability out of a
transistor oscillator. If your inductors are mechanically stout you
shouldn't be having vibe problems -- what kind of precision are you
trying to get, what are you seeing, and what kind of inductor are you using?

See the bottom of my reply for a suggested circuit.

2) also when u use a fundamental crystal at 3rd overtone what are the
diferences in performance? i notice that it has a very narrow margin of
adjustment compared to fundamental, how to detemin what is the best loading
capacitance?

Overtone operation tends to be much higher Q than fundamental, and it is
best to run the circuit such that the crystal is running at it's series
resonant frequency. I would try to load the crystal with as little
capacitance as I could get away with, were I running the thing in
overtone mode.

3) is it normal for the 3rd overtone to vary so much in a fundamantal
crystal, and is the performance of crystals cut for 3rd overtone much better
(aside from initial acuracy )? and how much jitter can one expect ?

Crystal overtones tend to vary from the fundamental; crystals intended
for overtone operation are tested at the overtone frequency. I would
expect to see variation among crystals cut for the fundamental that
you're running on overtone, but I've never tried it myself so I don't
know how much.

the project im working on (mainly for interest) is time domain reflectometry
and im trying to see how much resolution i can get.
im using about 10-100 mhz signal and mixing this with a local oscilator to
get about 32khz IF this is done to efectivly multiply the delay by fsig/f IF

for the main signal i used a 10mhz crystal oscilator with a single gate
unbufered 74AC04 wich is buffered by another.

philps do a nice package with 1 unbufered and 1 bufered cmos inverter ideal
for this but unfortunatly i cant get them from farnel or rs

im using a PLL to generate the local oscuilator with a LC/varicap VCO (and
the same 2 single gate ic) and the beat frequency (derived with a single
gate xor) compared io a 32768 crystal oscilator. the IF signal is then
compared to this beat frequency to get the delay. im using a sa605 to do the
mixing and if.

however im geting quite a lot of jitter wich is as yet unacounted for. i
started using single gate ics everywhere becuase i had everything going
through one hex inverter and it was obvious there was too much interference
between devices in the chip, even for the low frequency if, and was cuasing
jitter when two signals transitioned quite close together.

i also noticed the LC VCO was constantly being adjusted and i was geting
0.1us jitter on the IF signal so i asumed this was the cuase, ( signal
strength was high). i was using 2 crystal oscilators before but this limited
my IF frequcny as to what crystals i cld find.

i decided to increase the signal frequency i only had 10 and 20mhz crystals
as i cldnt get much higher ones so i decided to try a 10mhz at 3rd overtone
to give about 30mhz.

however i was surprised that the resultant frequency was so far off the
fundamental, i know its not exact but i thoiugh it wld be a lot closer i get
a range of about 29.5 to 29.8 from a bag of 20 crystals. this was however a
bit usefull becuse i found 2 crystals just the right frequency to give a
diference of 32khz. and was still able to include it as the VCO in the PLL.

however i still get significant jitter, i had to use an inductor acros the
input to the crystal to get it to oscilate at 3rd overtone, i tried to get
it to oscilate at 5th but havnt been able to yet, i think the 74ac04 is fast
enough becuase the LC oscilator went well over 50mhz.

incidently i fnd that any trace of flux on the pcb makes things much worse,
its horible stuff !

many thanks Colin =^.^=

Here's the circuit that works for me. You _may_ be able to replace the
inverter with an inverter, but I've never tried it. The inductor and
variable cap should resonate slightly higher than the crystal overtone
frequency, and you're depending on the base-collector capacitance of the
transistor for feedback. I'm leaving out component values as an
indication that _you_ need to be responsible for it's correct operation.

The ARRL UHF Experimenter's Guide has another circuit that they highly
recommend (I think they hold my circuit below in high contempt), but I
haven't tried it, so I can't recommend it.


VCC
+
.------o
| |
| C| ___
| C| .---|___|--.
.-. C| | |
| | | || | |\ |
| | o--------o------||---o---| >O---o----
'-' | |_ || |/
| | |/|
| |/ -/-
---------o----| /--
| | |> / |
| | | |
_-_ .-. | |
|___| | | .-. |
- | | | | |
| '-' | | |
| | '-' |
=== | | ===
GND | | GND
=== ===
GND GND

created by Andy´s ASCII-Circuit v1.24.140803 Beta www.tech-chat.de

 

[colin]

sorry if this sort of subject has been covered here a lot but cant seem to
find what info i need ..

1) is there a way to get a cmos inverter xtal oscilator to 3rd overtone
without using an inductor? i tried a rc filter to the input of the crystal
but it wld oscilate at fundemental or not at all. the inductors seem to be
cuasing some jitter from vibration/interference. and what about 5th overtone
too ?

2) also when u use a fundamental crystal at 3rd overtone what are the
diferences in performance? i notice that it has a very narrow margin of
adjustment compared to fundamental, how to detemin what is the best loading
capacitance?

3) is it normal for the 3rd overtone to vary so much in a fundamantal
crystal, and is the performance of crystals cut for 3rd overtone much better
(aside from initial acuracy )? and how much jitter can one expect ?

the project im working on (mainly for interest) is time domain reflectometry
and im trying to see how much resolution i can get.
im using about 10-100 mhz signal and mixing this with a local oscilator to
get about 32khz IF this is done to efectivly multiply the delay by fsig/f IF

for the main signal i used a 10mhz crystal oscilator with a single gate
unbufered 74AC04 wich is buffered by another.

philps do a nice package with 1 unbufered and 1 bufered cmos inverter ideal
for this but unfortunatly i cant get them from farnel or rs

im using a PLL to generate the local oscuilator with a LC/varicap VCO (and
the same 2 single gate ic) and the beat frequency (derived with a single
gate xor) compared io a 32768 crystal oscilator. the IF signal is then
compared to this beat frequency to get the delay. im using a sa605 to do the
mixing and if.

however im geting quite a lot of jitter wich is as yet unacounted for. i
started using single gate ics everywhere becuase i had everything going
through one hex inverter and it was obvious there was too much interference
between devices in the chip, even for the low frequency if, and was cuasing
jitter when two signals transitioned quite close together.

i also noticed the LC VCO was constantly being adjusted and i was geting
0.1us jitter on the IF signal so i asumed this was the cuase, ( signal
strength was high). i was using 2 crystal oscilators before but this limited
my IF frequcny as to what crystals i cld find.

i decided to increase the signal frequency i only had 10 and 20mhz crystals
as i cldnt get much higher ones so i decided to try a 10mhz at 3rd overtone
to give about 30mhz.

however i was surprised that the resultant frequency was so far off the
fundamental, i know its not exact but i thoiugh it wld be a lot closer i get
a range of about 29.5 to 29.8 from a bag of 20 crystals. this was however a
bit usefull becuse i found 2 crystals just the right frequency to give a
diference of 32khz. and was still able to include it as the VCO in the PLL.

however i still get significant jitter, i had to use an inductor acros the
input to the crystal to get it to oscilate at 3rd overtone, i tried to get
it to oscilate at 5th but havnt been able to yet, i think the 74ac04 is fast
enough becuase the LC oscilator went well over 50mhz.

incidently i fnd that any trace of flux on the pcb makes things much worse,
its horible stuff !

many thanks Colin =^.^=

 

[Tim Wescott]

I doubt it. You really need to start with an circuit that wants to
oscillate at the overtone frequency, then put the crystal in.

I'd only use a CMOS inverter with a 3rd overtone with a lot of
qualification work -- I think you'll get better reliability out of a
transistor oscillator. If your inductors are mechanically stout you
shouldn't be having vibe problems -- what kind of precision are you
trying to get, what are you seeing, and what kind of inductor are you
using?

See the bottom of my reply for a suggested circuit.

Overtone operation tends to be much higher Q than fundamental, and it is
best to run the circuit such that the crystal is running at it's series
resonant frequency. I would try to load the crystal with as little
capacitance as I could get away with, were I running the thing in
overtone mode.



Crystal overtones tend to vary from the fundamental; crystals intended
for overtone operation are tested at the overtone frequency. I would
expect to see variation among crystals cut for the fundamental that
you're running on overtone, but I've never tried it myself so I don't
know how much.


Here's the circuit that works for me. You _may_ be able to replace the
inverter with an inverter, but I've never tried it. The inductor and
variable cap should resonate slightly higher than the crystal overtone
frequency, and you're depending on the base-collector capacitance of the
transistor for feedback. I'm leaving out component values as an
indication that _you_ need to be responsible for it's correct operation.

The ARRL UHF Experimenter's Guide has another circuit that they highly
recommend (I think they hold my circuit below in high contempt), but I
haven't tried it, so I can't recommend it.


VCC
+
.------o
| |
| C| ___
| C| .---|___|--.
.-. C| | |
| | | || | |\ |
| | o--------o------||---o---| >O---o----
'-' | |_ || |/
| | |/|
| |/ -/-
---------o----| /--
| | |> / |
| | | |
_-_ .-. | |
|___| | | .-. |
- | | | | |
| '-' | | |
| | '-' |
=== | | ===
GND | | GND
=== ===
GND GND

created by Andy´s ASCII-Circuit v1.24.140803 Beta www.tech-chat.de

You should also consider that a 74HCU04 gate has a typical propagation
delay of 7ns (according to my 1984 databook). This works out to 75
degrees of phase change in the amplifier at 30MHz, which is a _lot_. If
you were to see the maximum delay of 21ns you'd be up to 225 degrees,
which is absurd.

Even assuming that the phase change is better when the inverter is used
as a linear amplifier you still may not see good oscillator performance
at 30MHz with _any_ crystal.

 

[colin]

You should also consider that a 74HCU04 gate has a typical propagation
delay of 7ns (according to my 1984 databook). This works out to 75
degrees of phase change in the amplifier at 30MHz, which is a _lot_. If
you were to see the maximum delay of 21ns you'd be up to 225 degrees,
which is absurd.

Even assuming that the phase change is better when the inverter is used
as a linear amplifier you still may not see good oscillator performance
at 30MHz with _any_ crystal.

good point but im using an AHC part sorry if i didnt specify that clearly,
spec sheet sugests 2.6ns typical. ive seen it oscilating at over 110mhz with
an LC and 60mhz 3rd overtone with 20mhz cystal, but cant get it to oscilate
at 5th harmonic with a 10mhz although a very old 4mhz cystal oscilates quite
hapily at 7th,

strange ... maybe even 2.6 ns is too much .. maybe i cld just filter out
the 5th harmonics from the 10mhz wonder how efective that wld be .. think i
might go back to the breadboard and try a few circuits, theres so many to
chose from, think emiter folower seems favourite among many RF comunication
IC designers, for having lowest phase noise, although i found i had problems
geting 50% MS ratio without tweaking the bias point carefully, i saw an
inductorless emiter folower overtone circuit although i cant actualy see
that it would work.

my inductors are a bit crude, home wound of course, with 0.4 mm dia wire
wound on paper tube former and covered in super glue, but i did end up very
firmly gluing them directly to the pcb but still seemed to be prone to vib,
i cld sometimes see the PLL jumping out of sync then re aquiring... its set
up expecting very low rates of drift

im not sure how much oscilator jitter i can get away with, i think main
problem might be cross interference rather than circuit Q etc.. im trying to
resolve sub picosecond diferences but obviously this is averaged out over
about a second so im not sure how this wld actualy translate into what i can
get away with for jitter, obvioulsy the best i can get without going to
extremes.

colin =^.^=

 

[GPG]

Some info: http://www.analog.com/UploadedFiles/Application_Notes/177859566EE168.pdf

 

[Tim Wescott]

Some info: http://www.analog.com/UploadedFiles/Application_Notes/177859566EE168.pdf

Yet another way to do the same thing. It appears that this kills the
gain at the fundamental while allowing it at the 3rd overtone -- so it
wouldn't necessarily work at 5th overtone.

 

[Andrew Holme]

Yet another way to do the same thing.

More of the same (this time for the NE602):
http://www.semiconductors.com/acrobat/applicationnotes/AN1983.pdf

I've used the above, and also the Butler overtone oscillator circuit
in the RSGB Radio Communication Handbook, but I didn't need
sub-picosecond precision.

 

[colin]

http://www.analog.com/UploadedFiles/Application_Notes/177859566EE168.pdf

Yet another way to do the same thing. It appears that this kills the
gain at the fundamental while allowing it at the 3rd overtone -- so it
wouldn't necessarily work at 5th overtone.

thanks, interesting, this is the circuit i was using anyway, i think the
extra inductor kills the gain at frequencies lower than the desired by
tuning it with C2 ... C3 is just a dc blocking capacitor ( at least in my
circuit), and works ok for me for 5th and 7th (with a low frequency crystal
anyway)

i note it mentoins 3rd OT ESR is a lot higher so i asume at 5th is even
higher still and also ...Note that the circuit becomes more critical of
component tolerances as the overtone order increases, and 5th order
operation, and higher, is not recommended for production applications.

i did find another circuit for cmos inverter to get 3rd overtone with no
inductors, it just reduces the dc feedback resistor (usualy 1mohm) to about
3-6k i tried this and it is as efective as using an inductor.

im using 3.3 v suply too to reduce cross inteference, maybe it wld work if i
ran it at 5v but ive used some 74vlx ics to reduce noise, wich is above the
the max supply acording to the spec sheet, so il have to seperate them.

i found one 16.15 mhz crystal and this works at the right frequency so i
think il get some more, hopefully again il be able to find 2 that are about
32khz apart.

Colin =^.^=

 

[colin]

More of the same (this time for the NE602):
http://www.semiconductors.com/acrobat/applicationnotes/AN1983.pdf

I've used the above, and also the Butler overtone oscillator circuit
in the RSGB Radio Communication Handbook, but I didn't need
sub-picosecond precision.

thnks that looks realy usefull. i just wish somewhere like farnell or RS did
a wider range of crystals wld make this easier now.

il let u know how much resolution i cld get, 0.1 mm wld be quite usefull and
probably quite a chalenge, as its a diference of 0.7 ps at the input,
althogh its only 10ns at the if stage, i dont know whats been acheived
before.

0.01 mm wld be even more usefull but probably unrealistic, main problem i
see at the moment is that a change in reflected signal strength cuases a
significant phase change for various reasons at various parts of the
circuit, capacitance of the photodetector seems to vary slightly with curent
and as its loaded with a tuned circuit etc.... also when the first IF stage
starts to limit the phase changes very considerably due to the folowing
filter, although i avoid this with a pin diode gain control this also
introduces its own phase change dependant on signal strength. maybe i just
need to measure the error and take it into acount with the readings, but atm
i seem to get much more jitter than i can acount for, maybe i need to
rebuild with better capacitors etc.

Colin =^.^=

 

[Tim Wescott]

thanks, interesting, this is the circuit i was using anyway, i think the
extra inductor kills the gain at frequencies lower than the desired by
tuning it with C2 ... C3 is just a dc blocking capacitor ( at least in my
circuit), and works ok for me for 5th and 7th (with a low frequency crystal
anyway)
-- snip --
Colin =^.^=

Oh duh. Of course.

 

[colin]

un update if anyones interested, ..

ive managed to improve the jitter considerably now, using the inductorless
3rd OT cmos inverter circuit (just has dc feedback resistor reduced to 4.7k)
has elminated the inductors and made the circuit more stable, although i
found what was maybe a dodgy conection, those sot 353 packages with there
0.65 mm lead spacing are so dam dificult to solder using an ordinary
soldering iron on a home made pcb, so this may of cuased some of the
problem. also i lowered and pre regulated the supply to the on board
regulators so they produce much less heat as this was heating the crystals
up unevenly. just blowing on the circuit no longer cuases the PLL to lose
lock.

i have a high brightness led conected to the phase pulses of the 74vhc4046
im using for the PD so i can see the phase error signal, and now this
remains extinguished much more completly after it has locked, however i find
that just conecting a scope probe to parts of the circuit cuases it to
flicker eraticaly, i can detect a minimum of about 10ns per cycle total
jitter on the 32khz wave even from the 32k crystal oscilator, it also jumps
around eraticaly by about another 10ns when the PLL is locked on at zero
phase, maybe i shld introduce an offset so it requires a small phase error..

im using a hp 1740a osciloscope, i notice that when i conect a frequency
counter to the circuit the jitter doubles, so i dont know if the jitter is
in the circuit or the scope, or even just introduced by the scope conection.

i wonder how is jitter normaly measured practicaly?

colin =^.^=

 

[Scott Stephens]

1) is there a way to get a cmos inverter xtal oscilator to 3rd overtone
without using an inductor? i tried a rc filter to the input of the crystal
but it wld oscilate at fundemental or not at all. the inductors seem to be
cuasing some jitter from vibration/interference. and what about 5th overtone
too ?

Try putting several (odd number) of inverters in a ring, connected with
series R's and shunt C's to form a phase-shift oscillator. Then couple
the crystal to one of the nodes.

however im geting quite a lot of jitter wich is as yet unacounted for. i
started using single gate ics everywhere becuase i had everything going
through one hex inverter and it was obvious there was too much interference
between devices in the chip, even for the low frequency if, and was cuasing
jitter when two signals transitioned quite close together.

Sometimes you have to filter the chips from each other real good. Use
series R's as well as bypass C's.

--
Scott

**********************************

DIY Piezo-Gyro, PCB Drill Bot & More Soon!

http://home.comcast.net/~scottxs/

**********************************