# Circuit rectification help

Discussion in 'General Electronics Discussion' started by dc22, Mar 30, 2014.

1. ### dc22

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Mar 30, 2014
Hi I'm a bit of a noob on the topic and want to learn more about electronics but I just cannot get my head around this question. If somebody could assist me I would be really grateful

The question is basically saying that a given circuit has been made wrong - where it should be designed to work as full adder (taking 3 binary inputs and adding them together to O/P Sum and Carry). I have to change two of the gates to meet the specification. Here is the circuit screen dumped http://gyazo.com/1eb6102f482e5a7b67437ad213e36423

Do I just need to think nand equivalents or what?

Thanks

2. ### (*steve*)¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥdModerator

25,451
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Jan 21, 2010
Correct. I would say that the circuit would fail in any logic family I'm aware of.

Before I looked at the logic, I would concentrate on required conditions for the logic gates to operate in both of its states.

3. ### dc22

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Mar 30, 2014
What I have to do though is actually replace two of the gates with something else which I'm not sure of in order for the circuit to perform as full adder?

Thats what I am unsure of

4. ### KrisBlueNZSadly passed away in 2015

8,393
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Nov 28, 2011
No, Steve is talking about the actual electrical characteristics of the circuit, not the logic - yet. Your gate inputs are being driven from switches from VCC, but logic gates need valid logic levels at their inputs at all times.

5. ### dc22

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Mar 30, 2014
Yes, the circuit is driven by VCC? Do you mean that the actual structure of the gates is incorrect? if so that it the issue i wanted to resurrect in the beginning on me starting this thread, i said " I have to change two of the gates to meet the specification"

thanks

6. ### KrisBlueNZSadly passed away in 2015

8,393
1,270
Nov 28, 2011
OK, the problem that Steve identified is that the inputs of the logic gate will float when the corresponding switch is open. When the switch is closed, the input is pulled up to VCC, which is good. But when it's open, the input isn't connected to anything. With most logic families, it will pick up noise, and the logic level seen by the gate will be random and randomly changing. The simplest fix is to add a resistor from each of those inputs to GND so when the switch is open, they will be pulled low. The resistor value is not critical; 10k or 100k are commonly used, unless you're using TTL or LS or a similar logic family, in which case you should use 470 ohms.

As for fixing the logic, you should first identify the two outputs - one is the sum bit and the other is the carry output, but the diagram doesn't show which is which.

Then, label the inputs, and all the intermediate nodes, and draw up a truth table for the eight possible combinations of input states, and calculate the states of the intermediate nodes and the two outputs. Add columns for the desired (correct) output states, and see if that helps you see where the problem is.

7. ### dc22

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Mar 30, 2014
I do apologize for the late replies I hope you remain as helpful as you have been.

Anyway, I now see what the problem was you where trying to tell me and I have now realized my error. I missed a bit from the image I attached. Here is what it should have showed.
My only aim at the minute is to fix the logic. Yes, the diagram doesn't show which output is sum or carry, but I do know that the circuit should be designed to take the three binary inputs and add them together producing outputs of sum and carry. All I have to do is to change two gates in order for this to happen.

So far I have drawn up the table for the logic the circuit should be giving (Full adder)
But at this minute the circuit is giving me this. (HIGHLIGHTED = NOT WHAT I WANT)
Thanks

1,089
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Mar 10, 2013

Ratch

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Mar 30, 2014
10. ### Ratch

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Mar 10, 2013
Do whatever the link shows you to do. The full adder is a very common logic circuit extensively covered in logic textbooks and other digital literature. Study it well.

Ratch