CD4060 oscillator, max resistor value

[Joerg]

Hello Folks,

Got a design here that contains a few 4060 long timers with RC
oscillators. Battery operated so consumption counts. Some datasheets
state that the maximum value for any resistor in that area is 1M. Since
Rs (feedback resistor) must be at least twice Rt (timing resistor) this
leads to rather lowish timing resistor values. Since this is a logic
gate oscillator that requirement causes quite some current at voltages
around 10V.

Anyhow, the TI datasheet does not seem to state that maximum:
http://focus.ti.com/lit/ds/symlink/cd4060b.pdf

.... while ON-Semi does state a 1M maximum:
http://www.onsemi.com/pub/Collateral/MC14060-D.PDF

What gives? Why do some specify that max value as low as 1M for really
low leakage CMOS logic? A remnant from the olden days when this stuff
was leaky at times?

I usually use my own oscillators around CD40106 but this time those are
all used up and there ain't no space no more :-(

 

[[email protected]]

Hello Folks,

Got a design here that contains a few 4060 long timers with RC
oscillators. Battery operated so consumption counts. Some datasheets
state that the maximum value for any resistor in that area is 1M. Since
Rs (feedback resistor) must be at least twice Rt (timing resistor) this
leads to rather lowish timing resistor values. Since this is a logic
gate oscillator that requirement causes quite some current at voltages
around 10V.

Anyhow, the TI datasheet does not seem to state that maximum:http://focus.ti.com/lit/ds/symlink/cd4060b.pdf

... while ON-Semi does state a 1M maximum:http://www.onsemi.com/pub/Collateral/MC14060-D.PDF

What gives? Why do some specify that max value as low as 1M for really
low leakage CMOS logic? A remnant from the olden days when this stuff
was leaky at times?

I usually use my own oscillators around CD40106 but this time those are
all used up and there ain't no space no more :-(

The leakage current isn't through the CMOS gate, but through the gate-
protection diodes. And the manufacturers can't afford to test their
chips for long enough to be able to guarantee sub-microamp leakage
currents.

The TI datasheet probably doesn't specify a maximum timing resistor
because the TI marketing department was a crew of lying cheats back
when the data sheet was written, in the early 1970's. For all I know,
they may still be a bunch of lying cheats - the last time I fell foul
of their sins of omission was in the mid 1990's, but they just might
have cleaned up their act since then.

 

[Joerg]

The leakage current isn't through the CMOS gate, but through the gate-
protection diodes. And the manufacturers can't afford to test their
chips for long enough to be able to guarantee sub-microamp leakage
currents.

The TI datasheet probably doesn't specify a maximum timing resistor
because the TI marketing department was a crew of lying cheats back
when the data sheet was written, in the early 1970's. For all I know,
they may still be a bunch of lying cheats - the last time I fell foul
of their sins of omission was in the mid 1990's, but they just might
have cleaned up their act since then.

I'm pretty happy with TI, always was. Except once when they did a Texas
style obsolescence on a chip. Aim -> pull trigger -> bang -> gone. The
data sheet for the CD4060 seems to be a really old scanned copy.

 

[Winfield]

The leakage current isn't through the CMOS gate, but through the gate-
protection diodes. And the manufacturers can't afford to test their
chips for long enough to be able to guarantee sub-microamp leakage
currents.

I'm sure they know it's less but the automated testers can't
go that low.

As for myself, I've used up to 10M with the '4060, and didn't
feel too bad about it. But what I do worry about is the RC
time constant. As the charging node approaches the threshold,
small supply spikes, etc., could cause mishaps, as they shift
the logic thresholds. Most '4060 chips consist of an inverter
for the oscillator, followed by a second inverter, (for gain
and to provide the rest of the oscillator), followed by a
third-stage flip-flop or some other type of hysteresis stage.
So there's plenty of room for count-advance trouble if the
oscillator input's dV/dt is too slow.

The TI datasheet probably doesn't specify a maximum timing resistor
because the TI marketing department was a crew of lying cheats back
when the data sheet was written, in the early 1970's. For all I know,
they may still be a bunch of lying cheats - the last time I fell foul
of their sins of omission was in the mid 1990's, but they just might
have cleaned up their act since then.

I'd say TI has substantially cleaned up their act. I for one
have certainly changed my opinion about TI, for the most part.
Now I'm a dedicated customer.

 

[Barry Lennox]

Hello Folks,

Got a design here that contains a few 4060 long timers with RC
oscillators. Battery operated so consumption counts. Some datasheets
state that the maximum value for any resistor in that area is 1M. Since
Rs (feedback resistor) must be at least twice Rt (timing resistor) this
leads to rather lowish timing resistor values. Since this is a logic
gate oscillator that requirement causes quite some current at voltages
around 10V.

I built a number ( 35-ish) of long-duration timers (20-24 hours) using
the Philips 4541, which has a very similar oscillator. After mulling
over the exact problem in the datasheet you note, I did some
experiments with both Rs and Rt at 1M and Ct at about 1.4uF. (Actually
2 x Siemens poly 0.68 in parallel) It worked fine, and never caused
any problems to my knowledge in the 10+ years they have been in
service. I did note the time duration shifted by a little more than
the specs suggest over the range 0-50 Deg C, but precision was not
called for in the application.

Barry

 

[Chris Jones]

Hello Folks,

Got a design here that contains a few 4060 long timers with RC
oscillators. Battery operated so consumption counts. Some datasheets
state that the maximum value for any resistor in that area is 1M. Since
Rs (feedback resistor) must be at least twice Rt (timing resistor) this
leads to rather lowish timing resistor values. Since this is a logic
gate oscillator that requirement causes quite some current at voltages
around 10V.

Anyhow, the TI datasheet does not seem to state that maximum:
http://focus.ti.com/lit/ds/symlink/cd4060b.pdf

... while ON-Semi does state a 1M maximum:
http://www.onsemi.com/pub/Collateral/MC14060-D.PDF

What gives? Why do some specify that max value as low as 1M for really
low leakage CMOS logic? A remnant from the olden days when this stuff
was leaky at times?

I usually use my own oscillators around CD40106 but this time those are
all used up and there ain't no space no more :-(

I don't think you need to worry about Rs > 2Rt, I think that is just if you
want their frequency formula to work. As long as Rs is "high" I expect it
will still oscillate even if Rs < 2Rt, just at a different frequency.

Anyway I expect that most of your supply current might not be going into
charging/discharging the cap at all, quite likely a lot of current is going
through both the P and N channel FETs in the inverter where its input
voltage slowly approaches the inverter's threshold, and both N and P
channel devices are partly on.

To cure this, my only suggestions are to try not to make the supply voltage
exceed the sum of the N and P channel threshold voltages by too much, or
choose a different kind of oscillator.

You can determine (roughly) the sum of the N- and P channel threshold
voltages by getting an inverter and tying its output to its input, and then
feed the supply pin from a small current source or high value resistor.
Basically an unbuffered inverter with output tied to input is just two
diode-connected devices in series across the supply, and so with a really
low constant current into the supply pin, the input or output pin of the
inverter should be just over the N-ch threshold voltage, and the voltage
between the positive supply pin of the chip and the inverter input/output
will be just above the P-ch threshold voltage. Of course a "buffered"
inverter with its input tied to its output will really contain three
inverters and may not be stable. You might be able to make it stable for
this experiment by putting a big cap to ground on the input and output pins
that are tied together, thus hopefully making a dominant pole.

Chris

 

[Spehro Pefhany]

Hello Folks,

Got a design here that contains a few 4060 long timers with RC
oscillators. Battery operated so consumption counts. Some datasheets
state that the maximum value for any resistor in that area is 1M. Since
Rs (feedback resistor) must be at least twice Rt (timing resistor) this
leads to rather lowish timing resistor values. Since this is a logic
gate oscillator that requirement causes quite some current at voltages
around 10V.

Anyhow, the TI datasheet does not seem to state that maximum:
http://focus.ti.com/lit/ds/symlink/cd4060b.pdf

... while ON-Semi does state a 1M maximum:
http://www.onsemi.com/pub/Collateral/MC14060-D.PDF

What gives? Why do some specify that max value as low as 1M for really
low leakage CMOS logic? A remnant from the olden days when this stuff
was leaky at times?

TI gives the maximum leakage as +/-1uA at 85°C. If we assume a
threshold of 0.5*Vdd, the unit would stop working entirely with a
2.5M resistor and 5V, so the 1M is more-or-less within reason assuming
you could allow something like 30% change in timing and given that the
threshold can be different from 50%, and not necessarily in the
direction that's favorable.

I usually use my own oscillators around CD40106 but this time those are
all used up and there ain't no space no more :-(

Using >1M on regular CMOS is living in unspecified land, but you may
well be able to get away with it for a non-critical application. Note
that there's a 4 order of magnitude difference between typical and
maximum at 25°C, which should track over temperature.


Best regards,
Spehro Pefhany

 

[Martin Siegwarth]

Anyhow, the TI datasheet does not seem to state that maximum:
http://focus.ti.com/lit/ds/symlink/cd4060b.pdf

Page 3-161, Table:

Rx_max @ 10V, 50F = 20 MOhm

Regards, Martin

 

[Joerg]

TI gives the maximum leakage as +/-1uA at 85°C. If we assume a
threshold of 0.5*Vdd, the unit would stop working entirely with a
2.5M resistor and 5V, so the 1M is more-or-less within reason assuming
you could allow something like 30% change in timing and given that the
threshold can be different from 50%, and not necessarily in the
direction that's favorable.




Using >1M on regular CMOS is living in unspecified land, but you may
well be able to get away with it for a non-critical application. Note
that there's a 4 order of magnitude difference between typical and
maximum at 25°C, which should track over temperature.

Then again TI states a max of 20M for the timing resistor, backing off
to 10M at full VCC. Page 3-161:

http://focus.ti.com/lit/ds/symlink/cd4060b.pdf

And Rs (the front feedback) should be twice Rx or higher .... yikes.

What really surprised me though was the cross current of the first
stage, peaking to 400uA at 10V VCC. Since this is an unbuffered inverter
the oscillator spends quite some time in that area and the cross current
ramp duration is almost 40% of the phase.

 

[Joerg]

Joerg wrote:





I don't think you need to worry about Rs > 2Rt, I think that is just if you
want their frequency formula to work. As long as Rs is "high" I expect it
will still oscillate even if Rs < 2Rt, just at a different frequency.

Anyway I expect that most of your supply current might not be going into
charging/discharging the cap at all, quite likely a lot of current is going
through both the P and N channel FETs in the inverter where its input
voltage slowly approaches the inverter's threshold, and both N and P
channel devices are partly on.

Yes, that's correct, except when the timing resistor gets to be much
below 100K. In that case its contribution to the total is larger. But
for several hundred k the cross current dominates and that's not going
away no matter what, unless you lower VCC.

To cure this, my only suggestions are to try not to make the supply voltage
exceed the sum of the N and P channel threshold voltages by too much, or
choose a different kind of oscillator.

Unfortunately I can't in this case :-(

 

[Joerg]

I built a number ( 35-ish) of long-duration timers (20-24 hours) using
the Philips 4541, which has a very similar oscillator. After mulling
over the exact problem in the datasheet you note, I did some
experiments with both Rs and Rt at 1M and Ct at about 1.4uF. (Actually
2 x Siemens poly 0.68 in parallel) It worked fine, and never caused
any problems to my knowledge in the 10+ years they have been in
service. I did note the time duration shifted by a little more than
the specs suggest over the range 0-50 Deg C, but precision was not
called for in the application.

I wouldn't have to go above 1M either. But meantime I found out that the
lion's share of the power consumption is due to cross currents in the
first inverter. Higher than it used to be. Dang...

 

[Joerg]

Page 3-161, Table:

Rx_max @ 10V, 50F = 20 MOhm

Yes, but that doesn't seem right. Then the front feedback resistor would
have to be 40M or higher. This datasheet is a scanned version back from
the times when data sheet values often had to be taken with a grain of salt.

 

[Fred Bloggs]

I wouldn't have to go above 1M either. But meantime I found out that the
lion's share of the power consumption is due to cross currents in the
first inverter. Higher than it used to be. Dang...

If ultra-low power consumption is what you're looking for then the 4060
is the wrong part. The inverter is deliberately kept unbuffered so the
user has the option of using xystal feedback for oscillation. The
datasheet for the Philips HEF4060 has more detailed formulas for power
consumption versus frequency as a function of Vdd.

 

[Joerg]

If ultra-low power consumption is what you're looking for then the 4060
is the wrong part. The inverter is deliberately kept unbuffered so the
user has the option of using xystal feedback for oscillation. The
datasheet for the Philips HEF4060 has more detailed formulas for power
consumption versus frequency as a function of Vdd.

Correct. And I normally never use such internal "one size fits all"
oscillators. In this case we didn't have a choice. The circuit had to
fit onto a postage stamp and already contained over 50 parts. The timers
cannot share a common oscillator, not even a common chip, because one is
watching the other to prevent grief if the main timer stalls for some
reason.

 

[Fred Bloggs]

Correct. And I normally never use such internal "one size fits all"
oscillators. In this case we didn't have a choice. The circuit had to
fit onto a postage stamp and already contained over 50 parts. The timers
cannot share a common oscillator, not even a common chip, because one is
watching the other to prevent grief if the main timer stalls for some
reason.

Maxim has a battery monitor comparator optimized for ultra-low
feedthrough current at threshold. It's just an itty-bitty part. You can
use that as a relaxation oscillator, with much better defined threshold
levels, to drive the 4060. Or knock that Vdd down to 2V and level shift
the 4060 output back up.

 

[RST Engineering \(jw\)]

Isn't that a bit above the flash point of the epoxy package?

{;-)

Jim

 

[RST Engineering \(jw\)]

Isn't that a bit above the flash point of the epoxy package?

{;-)

Jim

http://en.wikipedia.org/wiki/Degree_symbol


Best regards,
Spehro Pefhany[/QUOTE]


Sorry, Sphero, my machine shows that temperature as eight hundred fifty
celsius. It doesn't show the degree symbol ° at all.

Jim

 

[Joerg]

Maxim has a battery monitor comparator optimized for ultra-low
feedthrough current at threshold. It's just an itty-bitty part. You can
use that as a relaxation oscillator, with much better defined threshold
levels, to drive the 4060. Or knock that Vdd down to 2V and level shift
the 4060 output back up.

But there the goose bumps often set in when you want to buy more than a
sample quantity.

2V is too low, CD4000 won't work there. But around 5-6V would be fine.
However, no space, not a speck of real estate :-(

 

[Spehro Pefhany]

Isn't that a bit above the flash point of the epoxy package?

{;-)

Jim

http://en.wikipedia.org/wiki/Degree_symbol


Best regards,
Spehro Pefhany

 

[Joerg]

Obviously your machine is not only screwing up rending of the "°"
symbol, but also scrambling the spelling of my name.

Yours isn't exactly an easy name though (Hungarian origin?). Neither is
mine, at least when it comes to pronouncing it.

Most newsreaders don't do well for specialty characters. Mine also
showed a zero for the degree sign in your post. The really weird thing:
It did show the correct degree sign in Jim's post but not in yours.

Maybe it's the Canadian character set ;-)