O
[email protected]
- Jan 1, 1970
- 0
I started this thread in the basics newsgroup but the issue is really
one of risk management at the design stage. Given that the data lines
of today's PC parallel port seldom ever uses open collector ouputs
(with no internal pull-up resistor) anymore, wouldn't it be a prudent
risk to not include pull-up resistors on the data lines in a device
that will interface with the PP?
one of risk management at the design stage. Given that the data lines
of today's PC parallel port seldom ever uses open collector ouputs
(with no internal pull-up resistor) anymore, wouldn't it be a prudent
risk to not include pull-up resistors on the data lines in a device
that will interface with the PP?