Capacitvely-loaded source follower

[Andrew Holme]

I'm looking at problem 7, chapter 9 of T. Lee "The Design of CMOS
Radio-frequency integrated circuits" regarding the input impedance of a
capacitively-loaded source follower. Cgd and rg are assumed zero. DC
biasing of the source is a constant-current sink so doesn't feature in the
AC analysis. There is only Cgs and load capacitance CL. It asks over what
range of load capacitance the real part of the input impedance is negative?
Is this a trick question? I think it is for all CL:

Vg = Vgs + Vs

Vg = Ig (Ig + gm.Vgs)
------ + -------------
jw.Cgs jw.CL


Vg = Ig 1 Ig
------ + ----- (Ig + gm.------)
jw.Cgs jw.CL jw.Cgs


Vg jw.CL + jw.Cgs + gm
-- = -------------------
Ig jw.CL . jw.Cgs


Vg -gm - jw(Cgs+CL)
-- = ----------------
Ig w^2 . Cgs . CL


View in a fixed pitch font.

 

[Andrew Holme]

Can you post the model they use?

They don't specify any model for the problem; but earlier in chapter 9 they
use a simple model comprising only rg, Cgs, Cgd and current generator gm.Vgs
which is what I'm using here.

 

[Wimpie]

I'm looking at problem 7, chapter 9 of T. Lee "The Design of CMOS
Radio-frequency integrated circuits" regarding the input impedance of a
capacitively-loaded source follower. Cgd and rg are assumed zero. DC
biasing of the source is a constant-current sink so doesn't feature in the
AC analysis. There is only Cgs and load capacitance CL. It asks over what
range of load capacitance the real part of the input impedance is negative?
Is this a trick question? I think it is for all CL:

Vg = Vgs + Vs

Vg = Ig (Ig + gm.Vgs)
------ + -------------
jw.Cgs jw.CL

Vg = Ig 1 Ig
------ + ----- (Ig + gm.------)
jw.Cgs jw.CL jw.Cgs

Vg jw.CL + jw.Cgs + gm
-- = -------------------
Ig jw.CL . jw.Cgs

Vg -gm - jw(Cgs+CL)
-- = ----------------
Ig w^2 . Cgs . CL

View in a fixed pitch font.

Hello Andrew,

No it isn't a trick question. For a wide range of source capacitance,
the input impedance shows a negative real part, which may cause
parasitic oscillation. Normally spoken there are real parts in the
transistor (that limits it's gain), these real parts limits the range
of capacitance where the input impedance has negative real part.

The negative input impedance is widely used in common collector and
common drain oscillators (where an inductance is between base or gate
and the ground (collector or drain).

The common collector oscillator is my favorite when I quickly need
some HF signal without high stability.

Best regards,
Wim
PA3DJS
www.tetech.nl
when you remove abc, the address is correct.

 

[Andrew Holme]

Took 4 pages of scribbling (whew!), but I get...

Real(Zin) negative when

w > sq-rt((rg*D)/(gm*B))

Where

B = Cgs*CL

D = (w^4)*(A*Cgd+B)^2 + (w^2)*gm*Cgd

A = Cgs + CL

I like to do these exercises just to keep my loop/node analysis skills
sharpened ;-)

Thanks Jim. Substituting the simplifying assumption rg=0, as stipulated by
the text book problem, into your inequality yields w>0, which convinces me
it was a trick question - in the nicest possible sense. This is typical of
the style of humour which generally makes Mr Lee's book very readable; but
did leave me slightly unsure in this instance.

 

[Andrew Holme]

Hello Andrew,

No it isn't a trick question. For a wide range of source capacitance,
the input impedance shows a negative real part, which may cause
parasitic oscillation. Normally spoken there are real parts in the
transistor (that limits it's gain), these real parts limits the range
of capacitance where the input impedance has negative real part.

Thanks Wim. This particular text book problem stipulates two simplifying
assumptions which make real(Zin) negative for *all* load capacitances, so I
think it is a trick question; but only with the intention of reinforcing the
lesson in the memory of the student.

 

[J.A. Legris]

Took 4 pages of scribbling (whew!), but I get...

Real(Zin) negative when

w > sq-rt((rg*D)/(gm*B))

Where

B = Cgs*CL

D = (w^4)*(A*Cgd+B)^2 + (w^2)*gm*Cgd

A = Cgs + CL

I like to do these exercises just to keep my loop/node analysis skills
sharpened ;-)

                                        ...Jim Thompson
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     It's what you learn, after you know it all, that counts.

Well now I'm impressed. I figured you were useless without your
computer. McCain should be so lucky!

 

[Tim Williams]

_If_ he attains the Presidency he's going to kick
some ass and shake Washington up like it's never been shook before.

What about Jackson? (You're old enough to remember Jackson, right? ;-) )
They say he had a mean temper at times.

Tim

 

[Frank Miles]

Thanks Wim. This particular text book problem stipulates two simplifying
assumptions which make real(Zin) negative for *all* load capacitances, so I
think it is a trick question; but only with the intention of reinforcing the
lesson in the memory of the student.

Wim is exactly right. This is not a "trick", it happens with any C-loaded
follower (bipolar or FET), though it is small enough that it isn't always
a problem.

For one example, take a look at the Tektronix 465 input source-follower:
why do you think that C18 and R18 are there?

-f

 

[Andrew Holme]

Wim is exactly right. This is not a "trick", it happens with any C-loaded
follower (bipolar or FET), though it is small enough that it isn't always
a problem.

For one example, take a look at the Tektronix 465 input source-follower:
why do you think that C18 and R18 are there?

-f

Frank, the text book problem stipulates "assume rg=0" and asks "over what
range of load capacitance the real part of the input impedance is negative?"
The point is it's negative for all load capacitances if rg=0. There is no
range, unless you count C>0 as a range. The sign of the impedance is
independent of CL.

 

[krw]

It's been rumored for a long time, long before Obama-lackey Weasel
Clark got into politics, that he was _asked_ to retire. I'll poke
around and see what I can find.

I heard that there were only three types of people in the service
career who disliked him; his subordinates, his superiors, and his
peers.