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Can you "swamp" a uc clock signal?

Discussion in 'Electronic Design' started by _, Nov 10, 2009.

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  1. _

    _ Guest

    Say I wanted to have a run/stop switch on a circuit controlled by a
    micro-processor. Could I halt the chip by holding the clock line high?
    Would this have to be done carefully (if at all) to not damage the clock
    generator circuit?
     
  2. Joerg

    Joerg Guest


    Murphy's law says that you happen to do this in the middle of a flash
    write cycle some day and then the whole thing might be on the fritz from
    then on.

    Use a proper interrupt pin.
     
  3. _

    _ Guest

    Don't think I can - the code is burnt, and they use the interupt pin for
    something else.
     
  4. Rich Grise

    Rich Grise Guest

    Which micro? If it's static, it shouldn't know the difference, but if it's
    dynamic (a la dynamic RAM) then you'll have to find a standby pin or
    something.

    Good Luck!
    Rich
     
  5. Joerg

    Joerg Guest

    Careful with flash write cycles. Besides shortened clock cycles and the
    troubles those cause a hard abort during a flash write could make that
    whole 256-byte or whatever flash segment toastissimo. What it reads next
    can be like the lottery.

    Also, some uC do not activate their brown-out reset upon clock failure.
    Some don't even have one.

    IOW my advice would be: Don't do that. Switch the signal instead and not
    the uC.
     
  6. Have a look at the microcontroller datasheet- specifically at the
    clock signal requirements. *If* you can avoid violating *any* of the
    requirements, the answer *might* be yes. Typically, for a modern
    static CMOS micro, this would involve synchronizing the on/off signal
    with an external oscillator (for example an oscillator module) using
    something like a 74HC73 to avoid short cycles and resulting
    malfunctions.

    OTOH, if the micro has a clock monitor function and/or a watchdog
    timer function (and if they are enabled) then it probably won't work.
    Typically they will reset the micro within milliseconds after a
    'failure' of the clock using internal RC oscillators or other timing
    circuits.

    Almost all modern micros have the latter functions, BTW, so your
    chances are not very good IMHO.


    Best regards,
    Spehro Pefhany
     
  7. krw

    krw Guest

    A lot of CMOS micros aren't static. The 8-bit variety likely are,
    though. This is something that you *really* need to investigate. It's
    often not specified directly. Check if there is a minimum frequency,
    though that may be a PLL thing (more ointment in your fly).
    I thought most of those used a timer/counter off the oscillator.
    I would tend to agree. Unless it's on the banner as a feature, I'd
    assume it's not possible.
     
  8. Yes. Some of the modern 32-bit micros have something like half a dozen
    PLLs to generate various clock domains from a single crystal, and none
    of them are going to like the clock running too slow, let alone
    stopping. And even some 8-bit ones now have PLLs, so minimum external
    clock frequency is in the low MHz if the PLL is enabled.
    No, because that's potentially disastrous if the clock fails (say, due
    to a bad crystal). Has to be independent and preferably entirely
    internal. I've seen some that combined such a timer/counter for the
    watchdog with a clock monitor to ensure there's still a reasonably
    fast clock coming in. Useless if a watch crystal is used (clock
    monitor has to be disabled) but usually something that runs off a
    watch crystal isn't connected to anything that can hurt anyone or
    anything much.

    Best regards,
    Spehro Pefhany
     
  9. PeterD

    PeterD Guest

    The only answer to this is to read the specifications for the UPC, the
    memory, and perphial chips. Some UPCs are dynamic and have a minimum
    clock speed, others are static and don't. Ditto for memory and support
    chips.
     
  10. krw

    krw Guest

    If the clock fails (bad crystal) your watchdog has nothing to bark at.
    It's dead, Jim. The 8051's watchdog timer was a counter/timer (I had
    one 8051 watching the other ;). I believe the TI 5K series of DSPs
    watchdogs' are too.
     
  11. krw

    krw Guest

    Some can be stopped in one state but not the other. Again, this sort
    of thing is going to be yelled about in feature headings.
     
  12. TheM

    TheM Guest

    I remember reading about maximum clock frequency change for one micro
    recently, I believe it was the AVR. Suggests that rapid frequency change is
    a bad idea. This might only affect certain functions, though, probably involving
    timers and TWI/USART functionality.

    M
     
  13. krw

    krw Guest

    Why would they care? The problem is the PLLs losing lock.
     
  14. TheM

    TheM Guest

    AFAIK a few AVR's do indeed have PLL, but I believe those are used
    for PWM/Timers. I guess we're both correct.

    M
     
  15. krw

    krw Guest

    Timers and such won't go squirrely if the oscillator changes. PLLs
    will.
     
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