Build a XOR with a MUX and a Invertor?

Input A of MUX = S1
Input B of MUX = NOT S1
Input S of MUX = S2


Working out the Truth Table....

If S1 and S2 are 0, the MUX output is S1, which is 0

If S1 and S2 are 1, the MUX output is NOT S1, which is 0

If S1 is 1 and S2 is 0, the MUX output is S1, which is 1

If S1 is 0 and S2 is 1, the MUX output is NOT S1, which is 1

Do I get the job?

Al

 

Hi all,

How to Build a XOR with a MUX(2 to 1) and a invertor?

Any suggestions will be appreciated!
Best regards,
Davy

 

There aren't that many ways how you can wire them together.

Try each possible way, and figure out the truth table, and
compare that with an XOR truth table.

Good luck with your home work

 

Hi Frank,

It's a interview problem and I just cannot answer it.
Anyone give an answer will be appreciated!

Best regards,
Davy

 

Well, there's your answer then -> "I cannot answer it".

 

An XOR on A and B is /A*B + A*/B using obvious notation. So you would
for example use A to drive the MUX bit select , then route B to the MUX
0 input and /B to the MUX 1 input:
View in a fixed-width font such as Courier.

 

Not with that reasoning- better luck next time....

 

The early Actel FPGAs used a logic module based on the MUX structure:
http://www.actel.com/documents/ACT1_DS.pdf

 

I guess I'm just dense, but how is this different from Al's solution?
Granted that you hooked it up a bit different than Al, but the outcome
is the same AFAICT.

 

Yep. An XOR is just a 4-quadrant multiplier. And that architecture,
in high speed circuits, has less glitch issues (if implemented with
all inputs differential, as in ECL/PECL).

...Jim Thompson

 

Fastest possible binary multiplier known
View in a fixed-width font such as Courier.

 

The MUX transfer function is OUT= SEL*IN1+/SEL*IN0, the XOR is
OUT=A*/B+/A*B, the substitution is clear, in contrast to this gibberish:
Input A of MUX = S1
Input B of MUX = NOT S1
Input S of MUX = S2
with which only the perpetually confused could not be aggravated.

 

Which is just a balanced modulator.

John

 

Or is it that the perpetually aggravated are confused?

John

 

The perpetually confused have no sense of comprehension and are
therefore never aggravated.

 

What percentage of your pay do we get for getting you this
job?

Thanks,
Rich

 

Well, I must be one of those "perpetually confused" then, because it
was perfectly clear to me. ;-)

Thanks,
Rich

 

Yep.

...Jim Thompson

 

What's so confusing about that?

Even if you didn't know what nomenclature I used, I don't think it's
terribly hard to work out.

"Input A of MUX...Input B of MUX" implies I am calling the 2 inputs of
the MUX A & B.

"If S1 is 1 and S2 is 0" implies that S1 and S2 are the inputs to the
system.

"Input B of MUX = NOT S1 " implies that I am using the NOT gate to
invert an input, and attach it to a MUX input.

Admittedly a picture would have been clearer, but it would have taken me
longer to draw then it took me to solve the problem

I didn't bother consciously making the substitution. I just mentally
combined the parts in my head for twenty seconds until I found something
that worked.

cheers,

Al