# BJT saturation

Discussion in 'Electronic Design' started by [email protected], Mar 25, 2013.

1. ### Guest

Regarding BJT saturation point, the books say that the transistor is said to be saturated if increasing Ib no longer increases Ic. For example, if I have a circuit where the the collector of NPN is at +5V through a 1K resistor, maximum Ic is 5ma. Assuming hfe is 100, above 50uA of Ib doesn't increase Ic due to 1K resistor. Is this the saturation point for the transistor? If this is the case
then it largely depends on the current limiting resistor of Ic. Am I missing something here?

-Mark JS

2. ### mikeGuest

You're missing an objective.
What are you trying to accomplish?
Discussing a definition does little to make an undefined
circuit work.

3. ### Bill SlomanGuest

If you are seriously interested in getting a low saturation voltage,
you use an inverted high-current-gain transistor, driving your base
current through the base collector junction and treating the emitter
as the collector.

Old-fashioned textbooks still cover this.Trevor. H. Wilmshurst's
"Analog Circuit Techniques" seems to be one of them.

4. ### Jon KirwanGuest

When looking for a definition I can easily explain and others
can precisely understand without equivocation, that's the
view I take.

Jon

5. ### Tim WilliamsGuest

Power transistors don't saturate?

Silly Jimmy ;-)

Tim

6. ### JamieGuest

But shit for gain..

Jamie

8. ### Guest

That's a nice technique.

9. ### mikeGuest

Can you explain how that works? Where you tie the collector can't
affect the saturation characteristics of the transistor???

Stated another way, can't you do the same thing with two diodes.
Saturation not involved?????

10. ### Bill SlomanGuest

<snipped John Larkin getting personal>

But you didn't know that an inverted transistor does it better, which
was common knowledge back in the 1970s.

Obviously, you can bodge the saturation voltage down to zero, but the
crucial point is that the offset voltage of a saturated inverted
transistor is a lot less than that of the same transistor biased
conventionally. I've no idea whether the bodge current for exactly
zero offset would be more or less, but you start off with less offset
to cancel out.

One more case where you weren't paying enough attention as an

I got an extended lesson in the technique back in 1974, when my boss
at Kent Instruments in Luton had me put together a slow but cheap and
accurate two-quadrant PWM-based multiplier, where we used two
saturating switches in series to get a very low offset voltage when
the swtiches were on. The first transistor was run conventionally, and
sank the bulk of the current, while the second was run inverted to
minimise the offset voltage. Slow, but 0.1% accurate.

11. ### Robert BaerGuest

At (the original) Fairchild, the C-B forward bias had to equal the
E-B forward bias before we considered the transistor to not be active.

12. ### Robert BaerGuest

Check, but why limit to the NPN?

13. ### Robert BaerGuest

I picked a randumb NPN and that "reversal" is seen in the region of a
forced beta of 0.1 and Ic in the region of <1mA.