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Bias current cancellation

Discussion in 'Electronic Design' started by Joel Kolstad, Oct 30, 2003.

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  1. Joel Kolstad

    Joel Kolstad Guest

    Could someone give me a hint as to how the input bias current cancellation
    scheme shown in Linear's LT1211 data sheet
    (http://www.linear.com/pdf/12112fb.pdf) functions? The + input to the
    cancellation amp is presumably at almost the exact same voltage as Vin...
    and the cancellation amp therefore 'feedbacks' Vin to, uh, Vin and somehow
    the input bias current goes away? I'm thinking the vertical 1M resistor is
    just so that the impedance seen by Vin is still high (1M), but it's unclear
    to me why the frequency selective network in the feedback arm of the
    cancellation arm is needed (with a ~7.24kHz frequency)...

    Thanks,
    ---Joel Kolstad
     
  2. Jim Thompson

    Jim Thompson Guest

    Yes ;-)

    Write down all the input bias currents on the schematic (call it "ib")
    and then you'll see how it works... it's not perfect, it still has
    offset potentials due to "ib".

    ...Jim Thompson
     
  3. Jim Thompson

    Jim Thompson Guest

    Can anyone see how to perfect the compensation ?:)

    ...Jim Thompson
     
  4. Joel Kolstad wrote...
    LT1211, are we on the same web page? I only see a simple
    emitter-follower input, with no bias-current cancellation.

    Thanks,
    - Win

    whill_at_picovolt-dot-com
     
  5. Ian Buckner

    Ian Buckner Guest

    Win, application example on the very first page.

    Jim: make Rf = RgRs/(Rg+ 1M), where Rs is the source resistance?

    Regards
    Ian
     
  6. Just an off-topic question, did you receive the FTL cable yet,
    it seems to be awfully quiet on the FTL front.
     
  7. Frank Bemelman wrote...
    No, nor did I get an email with the waybill number.
    I'm not holding my breath. <smile>

    Thanks,
    - Win

    whill_at_picovolt-dot-com
     
  8. Jim Thompson

    Jim Thompson Guest

    No.

    ...Jim Thompson
     
  9. Ted Wilson

    Ted Wilson Guest

    Hi Joel

    There are folks already in this thread that can give a much more
    comprehensive answer than I can, but, since everone seems to hanging
    back, I'll try and answer your questions.

    Consider circuit below:

    Rg Rf
    +---/\/\/\---+----/\/\/\----+
    | | |
    -+- 0V |Iinv1 |\ A1 |
    +-<----|-\ |
    |Ininv1| >----+--- Vout
    Vin------+----<----|+/
    | | |/
    / |
    \ +-----------+
    /| |
    Rc(=1M)\|V1 |
    /| A2 |
    \V |
    | /|Ininv2|
    Ic v /+|-->---+
    +----< | Iinv2
    | \-|-->---+
    | \| |
    | V1-----> |
    +-----/\/\/\---+
    Rs(=1M)


    In order to deliver bias current cancellation at the signal input, the
    circuit assumes that the four input bias currents, Iinv1, Ininv1,
    Iinv2 and Ininv2, are equal and that there in no input offset voltage
    in either amp.

    So, let Iinv1 = Ininv1 = Iinv2 = Ininv2 = Ib

    With no input offset voltage present, the inverting and non-inverting
    inputs of both A1 and A2 will all be at Vin. For the purpose of
    simplicity, assume for now that Vin is zero.

    Iinv2, (=Ib), flows through Rs and generates a voltage, V1, at the
    output of A2, equal to the product Ib*Rs.

    This voltage is therefore applied across Rc, resulting in a
    compensating current given by:

    Ic = V1/Rc

    Since V1 = Ib*Rs

    Ic = Ib*Rs/Rc and, since Rs = Rc = 1M

    Ic = Ib

    Therefore the input bias requirement of A1 is entirely met by the
    current supplied through Rc.

    (The capacitor across Rs in the LT application note, (not shown here),
    provides high frequency roll off for the noise generated at the output
    of A2 by noise on A2’s bias current).

    Aside from the fact that circuit relies on perfect matching in the
    bias currents of the two amps, and also zero input offset voltage, to
    deliver precise bias current cancellation, there is one obvious source
    of error in the above circuit.

    A1's inverting input and A2's non-inverting input are supplied through
    the parallel combination of Rg and Rf, giving rise to an error voltage
    at these inputs given by;

    Ve = 2*Ib*Rg*Rf/(Rg + Rf)

    Depending on the magnitudes of Rg and Rf, this error may not be
    negligible, in which case it needs to be compensated for. This can be
    done by increasing the value of Rc from 1M to (1M + 2*Rg*Rf/(Rg +
    Rf)), or by changing the circuit configuration; one possibility shown
    below:

    Rg Rf
    +---/\/\/\---+----/\/\/\----+
    | | |
    -+- 0V |Iinv1 |\ A1 |
    +-<----|-\ |
    Ininv1| >----+--- Vout
    Vin------+--+-<----|+/
    | | |/
    / |
    \ +-----------+
    /| |
    Rc(=1M)\|V1 |
    /| A2 |
    \V |
    | /|Ininv2|
    Ic v /+|-->---+
    +----< | Iinv2
    | \-|-->---+
    | \| |
    | V1-----> |
    +-----/\/\/\---+
    Rs(=2M)

    Note: The values of Rs and Rc do not have to be based on 1M, it is
    their relative values that matters.

    Jim may well have some more subtle tricks in his locker, in which case
    I'll watch and learn along with you when he produces them.

    One final point: Given that this circuit relies so heavily on the
    matching of the various bias currents, one could be forgiven for
    asking: "why not simply balance the resistance in the two input legs
    to A1 and rely on reducing errors to those associated with input
    offset currents as opposed to bias current?". (That's as good as you
    are going to get anyway with the above circuits).

    Good question!

    The only answer that springs to my mind is that you would use such a
    circuit when the source resistance is high AND is either not
    accurately known, or not very stable with time/temperature etc., or is
    not accurately repeatable from one unit to another.

    Hope some of this helps

    Regards

    Ted
     
  10. Jim Thompson

    Jim Thompson Guest

    On 30 Oct 2003 07:22:41 -0800, (Ted
    Wilson) wrote:

    [snip]
    You're on the right track, but no cigar. Your version has the
    potential to walk off to one side or the other with Hi-Z input
    sources.

    I don't do ASCII "art", but I'll post something to a.b.s.e later
    today.

    ...Jim Thompson
     
  11. Michael

    Michael Guest

    If I might take a poke at it.

    The current through the lower horizontal 1M causes the output of the
    cancellation amp to sit a little below Vin, the vertical 1M then
    effectivly becomes a constant current sink aprox= to the bias current
    required by +input of the signal amp.


    I don't know what the 22pF is for, if it is for stability then can I
    ask a question? Why does INCREASING the amount of NFB at HF improve
    stability when feeback causes the instability in the first place?
     
  12. Jim Thompson

    Jim Thompson Guest

    To see it done with the lowly LM324 see
    "IB-Cancellation-WithTwoOpAmps.pdf" on the S.E.D/Schematics page of my
    website.

    ...Jim Thompson
     
  13. Michael

    Michael Guest

    Sorry Ted, I must confess I didn't read your post properly prior to my
    last post, I'm looking forward to Jim's next post because I think you
    deserve the cigar.
     
  14. Ian Buckner

    Ian Buckner Guest

    Very elegant, Jim.

    Regards
    Ian
     
  15. Ted Wilson

    Ted Wilson Guest

    As with all the best ideas - so simple, I can't believe I missed it! Thanks Jim.

    Ted
     
  16. Ted Wilson

    Ted Wilson Guest

    [snip]
    Joel

    There's just one other thing about this circuit that I think is worth
    pointing out, as at first glance it might appear to run counter to
    conventional wisdom when dealing with op-amps and bias/offset
    currents.

    Whilst the above statement from my earlier posting is true, it is
    important that Rs and Rc are high enough that the Ib*Rs and Ib*Rc
    products are significantly higher than the input offset voltage of the
    amplifiers, i.e. at least a factor of ten or more.

    Regards

    Ted
     
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