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BCD Up/Down Counter

Discussion in 'Electronic Basics' started by Natty, Aug 24, 2005.

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  1. Natty

    Natty Guest

    Hello everyone!

    I am using a presettable BCD up/down counter (CD 4029BE) in my project.
    I want to test the counter IC by giving a clock input. I tried using a
    square wave as a pulse from the sigal generator. It didnt work, All
    other connections in the circuit seems to be correct. I really doubt
    the way I am giving the clock pulse to BCD up/down counter. I wud very
    much appreciate ur help.

    Thanking you.

  2. If the signal generator has a peak to peak voltage that swings across
    the full supply range of the counter, it should drive the chip. 4000
    series CMOS is quite forgiving of rise and fall time variations, as
    long as there is no ringing at the edges. If in doubt about the
    ringing, add a 10 k resistor in series with the clock line. By the
    way, CMOS does not tolerate inputs left floating. Make sure you have
    tied all inputs other than the clock either to the positive or
    negative supply rail, as needed to set up the operation. In this
    case, that includes the preset enable, the jam inputs, the clock
    enable the binary/decade selector and the up/down control.
  3. Chris

    Chris Guest

    Hello, Raghs. As is always the case with logic ICs, go to the data
    sheet first. They are meant to be used and understood easily, and are
    fairly staraightforward once you get the hang of reading them.

    The 4029 is a versatile counter chip, which is presettable,
    cascadeable, and can count up or down in either decimal (base 10) or
    binary (base 16). What more could you want? Possibly a little simpler
    to use? Can't have everything, sir.

    Anyway, the first thing you should look at is the signal generator.
    Most of them have TTL outputs, and that should work well if you power
    the Device Under Test (DUT) IC with a +5V supply. If your signal
    generator doesn't have a TTL output, set it for square wave output and
    use the DC offset to make the + and - excursions of the output logic
    level (+5V and 0V).

    Now look at the IC itself. Remember that all inputs have to be tied to
    a logic level with CMOS. You need to figure out what to do with the
    veritable plethora of control pins. That depends on what you want to
    do with the chip.

    But let's do it simply, and suggest that you just want to set it up as
    a base 10 up counter with no preset (just to see it work). To do that,
    you tie pin 1 and pin 5 low (0V). Pin 9 should be low to divide-by-10,
    and pin 10 is high to count "up", Now tie all your preset pins (4, 12,
    13, and 3) low just to have them at any logic level. Now you can power
    up and apply your TTL Output from the signal generator to the CLK (pin

    Look at your output pins and see the IC count up in BCD before your

    By the way, if you seem to have trouble with one manufacturer's
    datasheet, look at another. The slightly different explanation may
    clear up any residual questions.

    Good luck with your class, sir.

  4. john jardine

    john jardine Guest

    Function genny's usually have DC coupled outputs. Maybe it's trying to send
    a useable logic swing but it's sitting on a DC output level that could be
    anywhere from (say) +10V to -10V.
    The DC offset needs setting to be 1/2 of the CD4029BE supply voltage
    (there's usually a "DC offset" knob) . Measure the offset using a DC meter
    stuck in the output socket and the genny output voltage wound down to zero.
  5. Natty

    Natty Guest

    hellooo Chris and others,

    thank you for ur timely help. I was able to sort out the problem
    yesterday. this time I used a pluse signal.. I reduced the duty cycle
    to 50%, offset was made zero inorder to have only the positive half and
    not the negative half bcoz clk signal has only + or zero. thats it.. it
    started counting. ;-) thanks a bunch.

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