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Bad switch debouncer, or something else?

P

Peter S. May

Jan 1, 1970
0
Hiya, folks. Back from a three-week building hiatus with a freshly
delivered pile of parts and some ambition. Well, that, and a problem.

I'm testing my comprehension of the operation of a 74HC595 (serial-in
shift register with output D-type FFs) by attempting to operate it via
SPST pushbutton switches. Since inputs are never supposed to be left
floating, I've been using the following debouncer for each input:

+5V
^
|
/
\ R (10K nom.)
/
| 1/6 74HC14
| Schmitt-triggered inverter
+--------------------|S>o----------------------> out
|
| SPST N.O.
+-------------------------o o----+
| --- |
= C (10nF nom.) ' |
| |
+--------------------------------+
|
---
GND

The output is low on open, high on closed.

The present configuration is such that three of the above modules have
been assembled--one each for the HC595's signal in, clock, and latch
inputs, and the register's parallel outs are connected to the cathode
leads of LEDs through 1K resistors.

On power-up, all LEDs are on, as expected.

The ensuing expected behavior would be as follows: A press of the clock
button would shift in a bit whose value is determined by the
pressed/released state of the signal button. After doing this one or
more times, pressing the latch button would cause the LEDs to reflect
the internal state of the register.

What actually happens currently is similar to what could happen if the
clock button is a little shaky; it is as it is supposed to be except
that it appears as if the clock key were pressed more than once when
pressed only once, variously shifting in between 1 and 5 bits each time.

I've tried varying values for R and C to increase the time constant (to
the point of making a visible pause when probed) to no effect. There's
a .1uF ceramic cap on each IC's +V pin to ground, close to the +V pin.
It's all being constructed on a breadboard, if that helps/hurts.

So, is this a good or bad button debouncer? (If it's good, I have
another question: Can the +5V and GND be swapped on it to make it
open=high, closed=low?) Do I need to bark up a different tree for this
diagnosis?

Thanks
PSM
 
D

David L. Jones

Jan 1, 1970
0
Hiya, folks. Back from a three-week building hiatus with a freshly
delivered pile of parts and some ambition. Well, that, and a problem.

I'm testing my comprehension of the operation of a 74HC595 (serial-in
shift register with output D-type FFs) by attempting to operate it via
SPST pushbutton switches. Since inputs are never supposed to be left
floating, I've been using the following debouncer for each input:

+5V
^
|
/
\ R (10K nom.)
/
| 1/6 74HC14
| Schmitt-triggered inverter
+--------------------|S>o----------------------> out
|
| SPST N.O.
+-------------------------o o----+
| --- |
= C (10nF nom.) ' |
| |
+--------------------------------+
|
---
GND

The output is low on open, high on closed.

The present configuration is such that three of the above modules have
been assembled--one each for the HC595's signal in, clock, and latch
inputs, and the register's parallel outs are connected to the cathode
leads of LEDs through 1K resistors.

On power-up, all LEDs are on, as expected.

The ensuing expected behavior would be as follows: A press of the clock
button would shift in a bit whose value is determined by the
pressed/released state of the signal button. After doing this one or
more times, pressing the latch button would cause the LEDs to reflect
the internal state of the register.

What actually happens currently is similar to what could happen if the
clock button is a little shaky; it is as it is supposed to be except
that it appears as if the clock key were pressed more than once when
pressed only once, variously shifting in between 1 and 5 bits each time.

I've tried varying values for R and C to increase the time constant (to
the point of making a visible pause when probed) to no effect. There's
a .1uF ceramic cap on each IC's +V pin to ground, close to the +V pin.
It's all being constructed on a breadboard, if that helps/hurts.

So, is this a good or bad button debouncer? (If it's good, I have
another question: Can the +5V and GND be swapped on it to make it
open=high, closed=low?) Do I need to bark up a different tree for this
diagnosis?

Thanks
PSM

There is nothing wrong with that debounce circuit you are using,
although a "one-shot" circuit is a bit better suited for the task.
You only need a debounce for the shift clock input, the data input and
latch inputs do not need to be debounced.

Sure the data input is not changing somehow when the shift clock comes
along?

If you were keen you could hook up say a 4026 7-segment counter
decoder as a debug tool to the shift clock line to see if you really
do have a problem there.

Dave.
 
D

David L. Jones

Jan 1, 1970
0
There is nothing wrong with that debounce circuit you are using,
although a "one-shot" circuit is a bit better suited for the task.

I forgot to mention, try putting a resistor in series (100R say) with
the switch to make sure it discharges slower when the switch closes. A
sudden short circuit on the cap without any series resistor can create
all sorts of havoc, especially if you are using long wires on a
breadboard.

+5V
^
|
/
\ R (10K nom.)
/
| 1/6 74HC14
| Schmitt-triggered inverter
+--------------------|S>o----------------------> out
|
| 100R SPST N.O.
+------/\/\/--------------o o----+
| --- |
= C (10nF nom.) ' |
| |
+--------------------------------+
|
 
D

David L. Jones

Jan 1, 1970
0
I forgot to mention, try putting a resistor in series (100R say) with
the switch to make sure it discharges slower when the switch closes. A
sudden short circuit on the cap without any series resistor can create
all sorts of havoc, especially if you are using long wires on a
breadboard.

+5V
^
|
/
\ R (10K nom.)
/
| 1/6 74HC14
| Schmitt-triggered inverter
+--------------------|S>o----------------------> out
|
| 100R SPST N.O.
+------/\/\/--------------o o----+
| --- |
= C (10nF nom.) ' |
| |
+--------------------------------+
|

Or better yet:

+5V
^
|
/
\ R (10K nom.)
/
| 1/6 74HC14
| 100R Schmitt-triggered inverter
+-----/\/\/\---------|S>o----------------------> out
| |
| |
0 | |
|- |
0 | = C (10nF nom.)
| |
+--------------+
|
 
H

Helmut Sennewald

Jan 1, 1970
0
Hello Peter,

your choosen capacitance is at least a factor of 100 too low.
You have to us 1uF or even better 10uF.
Just think on the bouncing time of a mechanical switch.
It's in the hundreds of microsends up to milli-seconds range.

Best regards,
Helmut
 
P

Peter S. May

Jan 1, 1970
0
David said:
I forgot to mention, try putting a resistor in series (100R say) with
the switch to make sure it discharges slower when the switch closes. A
sudden short circuit on the cap without any series resistor can create
all sorts of havoc, especially if you are using long wires on a
breadboard.

+5V
^
|
/
\ R (10K nom.)
/
| 1/6 74HC14
| Schmitt-triggered inverter
+--------------------|S>o----------------------> out
|
| 100R SPST N.O.
+------/\/\/--------------o o----+
| --- |
= C (10nF nom.) ' |
| |
+--------------------------------+
|

Way to call this one!

(The interested may wish to note that I got this to work with R = 100K,
C = 10nF, and the suggested 100R inlined with the switch.)

If I wanted to invert the output without actually applying another
inverter, would there be any disadvantage to swapping +5V and GND on the
above circuit?

Thanks!
PSM
 
D

David L. Jones

Jan 1, 1970
0
Way to call this one!

(The interested may wish to note that I got this to work with R = 100K,
C = 10nF, and the suggested 100R inlined with the switch.)
Cool!

If I wanted to invert the output without actually applying another
inverter, would there be any disadvantage to swapping +5V and GND on the
above circuit?

No problem, it will work just fine the other way around.

Dave.
 
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