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Backplane protocol

Discussion in 'Electronic Design' started by Paulo Valentim, Jun 17, 2005.

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  1. Hello! There are 16 slots and 1 controller card in one shelf all
    connected through a backplane. At any time the shelf is on a card
    might be hot swapped. Many of the cards are passive whereby they don't
    have any power circuits. The shelf controller needs to know if a card
    is connected to the backplane and which type of card it is. This
    information is stored in a EEPROM on the shelf card.

    The question is: Which protocol do you suggest for the communication
    between shelf controller and the other cards?

    Features (from most important to least):
    1. There must be some kind of ESD protection due to the hot-swapping.
    2. The number of lines in the backplane must be kept to a minimum.
    3. The speed is not critical as there is not much info to be passed
    through

    Possible ones: I2C, SPI, Dallas' 1-wire interface

    I2C is really recommended for in-card communication without
    hot-swapping so there is some concerns of the effectiveness of this
    solution.

    SPI requires too many lines in the backplane

    The 1-wire interface seems to be the most plausible although the tech
    rep from Maxim could not tell us the effectiveness with hot-swapping.

    Any suggestions or comments on these solutions?

    Thanks,

    - Paulo Valentim
     
  2. PeteS

    PeteS Guest

    I have used I2C for multiple hot-swappable cards (30 cards in a single
    backplane, 6 different possible types). The one issue you'll run up
    against is most I2C devices give you 3 bits of address, requiring
    multiple I2C controllers / hubs (if within an FPGA) for mroe than 8
    devices. This should not be a major problem. Assign the address bits
    from the backplane connector, and a 'zone' bit. I usually pull a line
    low when inserting a card.

    As to ESD protection, use a proper hotswap controller (lots around,
    depends on your system requirements) with 3-level pin lengths, and use
    ESD devices designed for signal lines (Murata makes a nice range of
    these, although there are others).

    The nice thing about I2C (or SMBus, which has the advantage in a
    hotswap system of implementing a timeout - I2C is spec'd to DC, so if
    you pull a card when a transaction is active, I2C will hang
    indefinitely) is everyone implements it.

    Just my $0.02

    Cheers

    PeteS
     
  3. Mac

    Mac Guest

    I'm with Pete. I think SMBus is a good way to go. The advantage of SMBus
    and I2c over SPI and presumably one-wire, is that SMBus is inherently
    addressable. SPI doesn't really know anything about addresses.

    As for the hot swapping, it might be worthwhile to read up on how
    CompactPCI does it, or how SCA connectors do it.

    In compact PCI, there are three main things pertaining to hot-swap:

    1) There is a static discharge strip on the card, which is connected to
    board ground by way of 10 Megohm (or so) high wattage resistors. The
    receiving chassis is designed to contact this strip as the board goes in.

    2) Pins are staged so that ground connects first (i.e., the ground
    pins are longer than all the others), then "early power," then
    other power and signal nets. The cards can only have so much capacitance
    on the early power nets. When early power comes on, the board is
    supposed to pre-charge all the signal nets within some finite amount of
    time, and make sure that the main power switches are completely off. Then
    when the real power pins connect, the hot swap controller powers up the
    board in a controlled way, without drawing too much current. This is to
    avoid having one card temporarily pull the whole chassis power rail
    down too low and cause a system reset. Typically there is a hot-swap
    controller on the card, and it takes care of most of this stuff. The whole
    thing is pretty involved, and I'm sure I'm glossing over some of the
    details, but it is interesting. PICMIG is the organization that puts out
    the CompactPCI specification.

    3) Once a board is fully powered up, it pulls a pin low or something
    (ENUM?) to send a signal that a hot swap event has occurred. the host
    would then have to go re-scan the PCI bus to see who the new kid is, and
    try to allocate it the PCI resources it needs. This part is more
    complicated than you need, I think.

    Hope that helps. Sorry that a lot of the details are hazy. It's been
    several years since I had anything to do with CompactPCI.

    --Mac
     
  4. PeteS

    PeteS Guest

    As Mac said, the power is applied in a sequence (that's what I was
    getting at with the three length pins).

    I've just done another hotswap design, and the critical questions
    really are:

    What's Vin and Iin.
    (that sets the limits on the controller you can use) - Note that I
    really like the LTC4211MS from Linear Tech; it's even host
    controllable/resettable and has circuit breaker functionality - also
    has controllable gate drive, so you can soft start the card. Very nice
    part with plenty of applications information. There are lots of others,
    notably from TI and Maxim, who also do a nice job of such things.

    ESD.
    It depends on your application as to how much ESD protection you need.
    As everything is in one unit, most of it is dealt with by staggering
    the power and signals as in Compact PCI hotswap (it's part of the PCI
    spec, available at http://www.pcisig.com/specifications/ ). By the time
    your signals get connected, everything's already at the same voltage
    levels (well, close enough, anyway). I have not found it necessary to
    use specific ESD protection within a single backplane.
    If you are paranoid enough, put a small cap to ground on the data and
    clock lines (but be careful not to exceed the bus capacitance limits as
    it will slow the bus beyond spec).

    Communications robustness.

    I2C is not preferred in hotswap because it can hang indefinitely -
    SMBus is virtually identical (same wire protocol) but implements a
    transaction timeout, and was designed for hotswap systems. Note that
    this is a Master issue, not a slave, so provided the master implements
    it, you shouldn't have a problem.

    Cheers

    PeteS
     
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