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Asynchronus Combination Lock

Discussion in 'General Electronics Discussion' started by Yigit Bireroglu, Jan 3, 2013.

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  1. Yigit Bireroglu

    Yigit Bireroglu

    Jan 3, 2013
    I have a project that I have to turn in tomorrow. I am having some difficulties. Its my first year at University, I would be really grateful for some help. Here’s the question,

    This combination lock has a minimum sequence of four two-bit input symbols as the combination and appears to the user as if it is an asynchronous circuit. Actually, it is a synchronous circuit with a fast clock and synchronization of the user inputs. For a given input combination, the circuit goes to a state and cycles there until the input changes to a new symbol; thus, the combination cannot contain consecutive appearances of the same symbol. The lock is locked by using an asynchronous RESET.

    It will be designed in VHDL Schematics.
    Thank you very much
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