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Another quirk in Spice?

Discussion in 'CAD' started by Paul Burridge, Nov 12, 2004.

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  1. Hi all,

    I've come across this simple circuit on the 'net that illustrates that
    Spice can't perform this kind of simulation without a DC path to
    ground. The narrative says that in the real world, the two 'bogus'
    resistors shown on this diagram wouldn't be necessary. I've not
    encountered this before. Has this defect in Spice been corrected since
    the article was written??

    Here's the circuit:

    http://www.burridge8333.fsbusiness.co.uk/spice_quirk.bmp
     
  2. It only needs one, not two.
    In general it is not a defect. Its due to basic physics principles. For
    AC analysis one can technically avoid this issue, but for DC or
    transient, its inherent. What voltage w.r.t ground do you actually
    propose *should* exist at the junction of two capacitors? Once you
    understand this, you will understand why Spice can't tell you either.

    Kevin Aylward

    http://www.anasoft.co.uk
    SuperSpice, a very affordable Mixed-Mode
    Windows Simulator with Schematic Capture,
    Waveform Display, FFT's and Filter Design.
     
  3. Paul,
    If you're doing a .ac analysis, the linearized ac potentials are
    defined at all frequencies (except 0Hz). LTspice runs the
    circuit just fine. Most other SPICE programs aren't smart
    enough to see it as a linear circuit and that therefor it doesn't
    need to know the DC potentials.

    --Mike
     
  4. Thanks, Mike. I suspected as much!
     
  5. The current in inductor loops are undefined at DC, too ;-)

    So LTspice takes a shortcut in the case of purely linear circuits? Perfectly
    reasonable, of course.

    What would LTspice do if the capacitors were voltage dependent? (Say, CMOS
    transistor gates...)

    Best Regards

    Jens
     
  6. Jens,
    It doesn't take the short cut. That would be an
    error. If you have non-linear reactances, LTspice
    needs the DC solution. When LTspice is compiling
    the circuit for execution, it notices whether or
    not the circuit is linear and behaves accordingly.

    --Mike
     
  7. So if LTS *needs* a DC path to ground for any reason in any
    circumstance to give a valid result; will it generate an error message
    flagging the problem or will we just get erroneous output values which
    might go unnoticed?

    Thanks,

    p.
     
  8. Paul,
    If LTspice *needs* the DC solution, then it *will*
    do a DC solution. But it still won't give you give
    you an error message for your circuit. LTspice can
    usually find the voltage of "floating" nodes by assuming
    the circuit was build without charge on the capacitors
    and then turned on. Try it.

    --Mike
     
  9. Jens,
    Yes, but to get the current LTspice release to run
    this, you have to run off topology checking. The
    topology of the circuit is checked in LTspice after
    it is compiled. One check is for a loop of voltage
    sources and inductors with no series resistance.

    For example, this deck will run in LTspice:

    *
    V1 N001 0 AC 1
    L1 N001 0 1m Rser=0
    ..ac oct 10 1u 1Meg
    ..options topologycheck=0
    ..end

    LTspice skips the topology check, so it doesn't
    quit when it sees L1 and V1 in parallel, and then
    LTspice sees this is a .ac analysis of a linear
    circuit, so the DC .op point isn't required.
    Then it plots the correct .ac data for a circuit
    without a defined DC solution.

    If the ".options topologycheck=0" isn't there,
    then you will get an error message that says,
    "Voltage source V1 and inductor L1 are paralleled
    making an over-defined circuit matrix. You will
    need to correct the circuit or add some series
    resistance."

    The next LTspice release will (i) document
    the topologycheck option in the help and (ii)
    no longer require you to turn it off for linear
    circuits that don't require a DC solution.

    --Mike
     
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