# Analog Homework

Discussion in 'Electronics Homework Help' started by vick5821, Dec 26, 2012.

1. ### vick5821

700
0
Jan 22, 2012
Dear friends,

I want to ask, what is the use of the capacitors there ? Can I just ignore it ? How will be the DC equivalent circuit and AC equivalent circuit ? what is the effect to the capacitors ?

How do I determine which one is bypass capacitorrs or coupling capacitors ?

Thank you

2. ### (*steve*)¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥdModerator

25,448
2,809
Jan 21, 2010
What do capacitors block?

What effect would a DC offset on vi have on Vg if the capacitor C1 is present? What about if it is absent?

At the operating point, what is Vs? Is this zero? What is vo with C2 present? What about if it is absent?

3. ### vick5821

700
0
Jan 22, 2012
Capacitors block DC is what I know so far.

Others I do not know. Hope to get some guide

4. ### (*steve*)¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥdModerator

25,448
2,809
Jan 21, 2010

If there is a DC voltage at the input, what effect does C1 have?

5. ### vick5821

700
0
Jan 22, 2012
C1 will be open circuit and there is no input voltage .

Correct me if I am wrong

6. ### (*steve*)¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥdModerator

25,448
2,809
Jan 21, 2010
OK, so does that affect the bias on the JFet?

7. ### vick5821

700
0
Jan 22, 2012
Yea, definitely cause there is no voltage supply to the gate of the FET

8. ### vick5821

700
0
Jan 22, 2012
But norrmaly, we do AC analysis on such question right ?

9. ### (*steve*)¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥdModerator

25,448
2,809
Jan 21, 2010
True, but the AC analysis presumes a certain operating point. What would happen to your operating point if the input had a DC offset and the capacitor was not present?

10. ### vick5821

700
0
Jan 22, 2012
Active mode ?

11. ### vick5821

700
0
Jan 22, 2012
Another question, for this below circuit :

Why is said that the test current i(t) flows in the parallel combination of r(pi) and R(E) ??

I understand both r(pi) and R(E) are parallel, but I cant see that the test current i(t) flows there ?

Or I missed out something ?