Analog/Digital supply / ground ?

[Sylvain Munaut]

Hello,

I have a small design question :


Components that interface to the external world like USB, firewire,
video encoder, ... have the notion of Analog Ground & Analog power. Is
is ok, if I connect them to the digital ones at a point that is near the
component that needs them and not close to the power supply, but I would
connect them trhu a :


Main VCC ----(_)(_?µH_)(_)----|---- Analog VCC
|
--- ? µF
---
|
###
GND

Main GND ----(_)(_?µH_)(_)------ Analog GND



Would that be OK ? And what values to use for the inductors ?




Sylvain Munaut

 

[Joerg]

Bonsoir Sylvain,

in most cases I found that connecting all ground pins to a common ground
plane via the shortest possible path works best. As long as that is a nice
plane over the whole circuit board. I had to redesign many, many systems to
that common ground scheme because they were very noisy and wouldn't pass EMC
tests otherwise.

As to supplies, these can be separate but must have bypass capacitors to the
ground plane very close to the supply pins. Also, sometimes the power has to
come up in a prescribed sequence but that would be found in the data sheets.

Connecting the rails from two different power supplies via an inductor is
something that should never be done. If one comes up later or for some
reason not at all this could result in a nice fireworks.

A bientot,

Joerg.

 

[Sylvain Munaut]

Bonsoir Sylvain,

Bonsoir également
Thanks for the answer.

in most cases I found that connecting all ground pins to a common ground
plane via the shortest possible path works best. As long as that is a nice
plane over the whole circuit board. I had to redesign many, many systems to
that common ground scheme because they were very noisy and wouldn't pass EMC
tests otherwise.

Yes, I have a complete ground layer. So just leaving it as plain as
possible will do even for mixed signals, cool ! That of course simpler.

As to supplies, these can be separate but must have bypass capacitors to the
ground plane very close to the supply pins. Also, sometimes the power has to
come up in a prescribed sequence but that would be found in the data sheets.

I only have one supply by voltages. And all the voltages are
monitored/tracked so that poweron/poweroff sequence are with a common
rising/falling ramp. It also have 'emergency' shutdown of all voltages
if for any reason one of them wouldn't come up.

I have many voltages & many components requires some sequencing so I
took a great look at that. I have 12V, 5V, 3.3V, 2.5V, 1.5V, 1.2V, -5V.

Connecting the rails from two different power supplies via an inductor is
something that should never be done. If one comes up later or for some
reason not at all this could result in a nice fireworks.

Wow, that not what I meant. It's just that I only have one power supply
that provides for example 5V and that I need it for digital Vcc and
Analog Vcc.
So I'd use a Inductor & Capacitor to prevent the noise generated by one
to go to another.


Sylvain Munaut

 

[Joerg]

Hi Sylvain,

Yes, breaking up the 5V can make sense. Run it directly from the 5V plane to all
digital pins and then a small RC or LC filter to very sensitive analog pins, with
the capacitor very close to the pin.

Then everything should be "tres bien". That's about all the French I know, wish I
knew it better. But out here in California we have to learn Spanish more than
French because we so close to Mexiko.

Au revoir,

Joerg.

 

[Sylvain Munaut]

Hi Sylvain,

Yes, breaking up the 5V can make sense. Run it directly from the 5V plane to all
digital pins and then a small RC or LC filter to very sensitive analog pins, with
the capacitor very close to the pin.

Thanks, how can I estimate the values of the L & C.
Also, for the Capacitor, there is multiples 'types' and I'm sometimes
lost ...

Then everything should be "tres bien". That's about all the French I know, wish I
knew it better. But out here in California we have to learn Spanish more than
French because we so close to Mexiko

Here there is no problem, we learn English. And even more in
electronics/computer world.

Was it that obvious that I'm french ?


Sylvain Munaut

 

[John Woodgate]

I read in sci.electronics.design that Sylvain Munaut <[email protected]>

Was it that obvious that I'm french ?

Not from what you wrote; it's perfectly normal English. Well done!

 

[Paul Mathews]

Thanks, how can I estimate the values of the L & C.
Also, for the Capacitor, there is multiples 'types' and I'm sometimes
lost ...



Here there is no problem, we learn English. And even more in
electronics/computer world.

Was it that obvious that I'm french ?


Sylvain Munaut

Inductors: There is a tradeoff among these factors - Size and cost, DC
resistance, B-field emissions, and saturation current. Also, some
types of inductors are deliberately lossy. Anyway, it takes some
study to choose the best type for an application. In general, choose
the highest inductance that will fit in available space at an
allowable cost that also has acceptably low DC resistance and
sufficient saturation current.

Capacitors: Multi-layer ceramic capacitors usually provide the highest
performance. With all capacitors, effective series resistance and
inductance limit performance at high frequencies. Impedance rises
beyond the self-resonant frequency, as seen on detailed datasheets,
Chip ceramic capacitors in wide packages have the highest
self-resonant frequencies. Choose the capacitor(s) with the lowest
impedance at the highest frequency of interest.

Hybrid filters: TDK, Murata, and Panasonic (possibly others) offer
excellent hybrid LC filters. These are your best bet if you remain
confused.

Paul Mathews

 

[Joerg]

Hi Sylvain,

Usually it is best to use SMT ceramic caps. 0.1uF is popular and when you expect very
high frequency noise maybe a 0.01uF in parallel, and the smaller one closest to the
pin.

If it draws only a few mA then I often opt for a 5 to 10 ohm resistor. Make sure you
don't cause problems with it's voltage drop. For an AD converter, for example, this
resistive filtering may not be a good idea. Otherwise a small wire and ferrite bead is
a good option. Place a drop of glue on the bead to avoid that nasty rattling noise.
These kind of "bead chokes" also come in SMT, check Panasonic and the other inductor
vendors.

As John said, your English is perfect. But your name sounds French and the way you
spelled your location does. The Flamish speaking folks in Belgium would have called it
"Leuven" I believe. I used to live not far away in the tiny village of
Vaals/Netherlands. There I spent a lot of time with Belgian racing bike riders of both
languages. Oh, do I miss that Belgian beer...

Greetings, Joerg.

 

[John Woodgate]

I read in sci.electronics.design that Joerg <notthisjoergsch@removethisp

Usually it is best to use SMT ceramic caps. 0.1uF is popular and when you expect
very
high frequency noise maybe a 0.01uF in parallel, and the smaller one closest to
the
pin.

SMT caps have very little inductance, so it is often optimal to have a
30:1 ratio, i.e. 100 nF and 3.3 nF.

 

[Sylvain Munaut]

Inductors: There is a tradeoff among these factors - Size and cost, DC
resistance, B-field emissions, and saturation current. Also, some
types of inductors are deliberately lossy. Anyway, it takes some
study to choose the best type for an application. In general, choose
the highest inductance that will fit in available space at an
allowable cost that also has acceptably low DC resistance and
sufficient saturation current.

Capacitors: Multi-layer ceramic capacitors usually provide the highest
performance. With all capacitors, effective series resistance and
inductance limit performance at high frequencies. Impedance rises
beyond the self-resonant frequency, as seen on detailed datasheets,
Chip ceramic capacitors in wide packages have the highest
self-resonant frequencies. Choose the capacitor(s) with the lowest
impedance at the highest frequency of interest.

Hybrid filters: TDK, Murata, and Panasonic (possibly others) offer
excellent hybrid LC filters. These are your best bet if you remain
confused.

Thanks a lot for all theses advices.


Sylvain Munaut

 

[Sylvain Munaut]

Hi

Usually it is best to use SMT ceramic caps. 0.1uF is popular and when you expect very
high frequency noise maybe a 0.01uF in parallel, and the smaller one closest to the
pin.

If it draws only a few mA then I often opt for a 5 to 10 ohm resistor. Make sure you
don't cause problems with it's voltage drop. For an AD converter, for example, this
resistive filtering may not be a good idea. Otherwise a small wire and ferrite bead is
a good option. Place a drop of glue on the bead to avoid that nasty rattling noise.
These kind of "bead chokes" also come in SMT, check Panasonic and the other inductor
vendors.

Thanks, I think I'll put single 100nF SMT ceramic cap for each
non-critical chips, 100nF & 3.3nF near each high-frequency chips and use
an LC filter for all chips that need a such called "Analog supply".

As John said, your English is perfect. But your name sounds French and the way you
spelled your location does. The Flamish speaking folks in Belgium would have called it
"Leuven" I believe.

Actually there is two city :
- Louvain La Neuve ( where I am, mainly a 'university campus city' )
- Louvain ( AKA Leuven for the Flamishs ) that is not far away but
it's a classic city.

I used to live not far away in the tiny village of
Vaals/Netherlands. There I spent a lot of time with Belgian racing bike riders of both
languages. Oh, do I miss that Belgian beer...

Sure that I do appreciate some good special beers too.


Sylvain Munaut

 

[Sylvain Munaut]

SMT caps have very little inductance, so it is often optimal to have a
30:1 ratio, i.e. 100 nF and 3.3 nF.

Ok, thanks. Just out of curiosity, where does that 30:1 ratio comes from ?


Sylvain Munaut

 

[John Woodgate]

I read in sci.electronics.design that Sylvain Munaut <tnt_at_246tNt_dot_

Ok, thanks. Just out of curiosity, where does that 30:1 ratio comes from ?

You look at the impedance/frequency curves of the caps, which most
manufacturers provide now, and see which parallel combinations give you
the lowest impedance over the largest bandwidth.

Two caps in parallel create a *parallel* resonance (roughly, the smaller
capacitance with the inductance of the larger one). A large ratio of
capacitances tends to minimise the bad effects of this resonance.

 

[Rich Grise]

Bonsoir également
Thanks for the answer.


Yes, I have a complete ground layer. So just leaving it as plain as
possible will do even for mixed signals, cool ! That of course simpler.

I've seen mixed circuits - specifically 16-bit DACs - with two separate
ground
planes on the same PCB, connected together at the ground pin of the edge
connector. Or maybe it was at the ground pin of the DAC itself. The Burr-
Brown guy could probably say which is better.

Good Luck!
Rich

 

[Joerg]

Hi Rich,

Dealing with these situations is my bread and butter. Many data books and
university courses advocate split grounds. But I can't recall one case where
that has worked reliably on a complicated mixed signal board. I always ended up
recommending a relayout with one single plane and things became really quiet.
Not that I would say that this is generally the case, I just haven't seen split
ground work too well.

Regards, Joerg.

 

[Beau Schwabe]

I've seen mixed circuits - specifically 16-bit DACs - with two separate
ground
planes on the same PCB, connected together at the ground pin of the edge
connector. Or maybe it was at the ground pin of the DAC itself. The Burr-
Brown guy could probably say which is better.

Good Luck!
Rich

In IC layout the reason for having separate grounds is to help reduce
noise. In Example 1 suppose that ckt GND #1 is supplying power
to something very current hungry making lots of noise. Because of
the IRD (Current vs. Resistance Drop) this noise becomes exaggerated
and will flow into ckt GND #2 more readily. If you look at Example 2,
you will still notice IRD, but because you have two separate lines to
supply GND current the "bleeding" from one circuit to the other is
greatly reduced.

Suppose you have a circuit....

Example 1:

IRD #1 IRD #2
GND source >----/\/\----o----/\/\----> ckt GND #2
|
|
o--> ckt GND #1



Example 2:

IRD #1
o---/\/\----> ckt GND #1
|
GND source>-o
| IRD #2
o---/\/\----> ckt GND #2

 

[KR Williams]

Hi Rich,

Dealing with these situations is my bread and butter. Many data books and
university courses advocate split grounds. But I can't recall one case where
that has worked reliably on a complicated mixed signal board. I always ended up
recommending a relayout with one single plane and things became really quiet.
Not that I would say that this is generally the case, I just haven't seen split
ground work too well.

I've done it successfully. Indeed one design (years ago) I
deleted the planes under the analog input section since the
capacitance of the signal to ground (back to signal) was too
high. The layout people thought I was nuts, and the wires going
nowhere (driven guards) helped their case. ;-) It worked better
than expected first time out, which helped my case. ;-) To be
fair, the layout people were used to "high frequency" logic
stuff.

 

[John Larkin]

Hi Rich,

Dealing with these situations is my bread and butter. Many data books and
university courses advocate split grounds.

I've never understood why anybody would waste a board layer just to
create two grounds that are at *different* potentials. The IC
manufacturers think their part is the center of the universe, so ask
us to connect the planes at their (presumably single) chip; this is
silly. (The university professors think *they* are the center of the
universe.)

John

 

[Roger Gt]

X-No-Archive: yes
"John Larkin" wrote
: Joerg wrote
:
: > Hi Rich,
: > Dealing with these situations is my bread and butter.
: > Many data books and university courses advocate split grounds.
:
: I've never understood why anybody would waste a board layer just
to
: create two grounds that are at *different* potentials. The IC
: manufacturers think their part is the center of the universe, so
ask
: us to connect the planes at their (presumably single) chip; this
is
: silly. (The university professors think *they* are the center of
the
: universe.) John

Not necessarily "TWO" layers, just isolated on the same layer. I
have used as many as four with the final (Mecca) connection at the
input power connection (8 pins) so all parts of the board had the
"SAME" potential rather than one circuit raising or inserting
noise into another circuit which needed a lower level of ground or
noise on the ground. Sometimes just the power bypasses are
contributors to a noise level if the clock rates are high and not
all the grounds are low enough impedance.

Guard lines are particularly good with very high frequency and
high impedance circuits to maintain a constant reference to a
non-conducting ground level.

Roger Gt.

 

[EEng]

I've done it successfully. Indeed one design (years ago) I
deleted the planes under the analog input section since the
capacitance of the signal to ground (back to signal) was too
high. The layout people thought I was nuts, and the wires going
nowhere (driven guards) helped their case. ;-) It worked better
than expected first time out, which helped my case. ;-) To be
fair, the layout people were used to "high frequency" logic
stuff.

Rather than a solid plane I use grid planes, like a printed faraday
shield. I keep analog and digital grounded together, and if there's
audio or rf, their planes are connected to the others via a 47uH to
100uH inductor. Its still one ground, but with some control. Never a
problem, although once there was a serious 60Hz hum due to power AC
on the board, but that was fixed with an inline filter.