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AD698 and fixed output

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Marco Trapanese

Jan 1, 1970
0
Hello,

some time ago I opened a thread about the AD698. I'm still in trouble. I
recall you the schematic:

http://img685.imageshack.us/img685/382/lvdt.png

and the circuit specifications:

Vs = 24V
Vexc = 10 Vpk-pk (tried also lower voltage)
fexc = 5 kHz
BW <= 10 Hz
Vout = 0-5V (2.5V at null)

I use a series opposed lvdt with a sensitivity of 1.366 mV/V/mil and a
range of ±500 mil.

Here some pictures of the behavior of the board.


Exciting wave:
http://img710.imageshack.us/img710/4100/img106xy.jpg
http://img338.imageshack.us/img338/6969/img107wo.jpg

Secondary wave (output of lvdt):
http://img580.imageshack.us/img580/4154/img108v.jpg

It is at maximum displacement. At null reach zero volt.

Afilter signal:
http://img827.imageshack.us/img827/2142/img109gb.jpg

Bfilter signal:
http://img9.imageshack.us/img9/4858/img110fl.jpg

Output signal:
http://img17.imageshack.us/img17/6429/img111on.jpg

This is centered on about 2.6V (from resistor divider on sig ref) but it
remain fixed moving the lvdt position. Instead I want it changes between
0 and 5V.

I tried also to place a resistor across the demodulator input (as
suggested in the previous thread) with no effect.

I have no idea how to find the cause of the problem :(
Marco
 
M

Marco Trapanese

Jan 1, 1970
0
Il 13/10/2011 12:16, Bill Sloman ha scritto:
You've got a single supply set-up, yet image 106 shows the exciting
waveform swinging between +5V and -5V.


Yep, 106 and 107 are the same waveform with oscilloscope set in AC and
DC mode. I put also the AC one so you can read the measurement.

In particular, the output from the secondary winding (actually opposed
secondaries) will be AC coupled to the driving waveform. If you - or
somebody else - has grounded the centre-tap of the secondary,


No. The centre-tap is disconnected.

the
voltages being fed into the +Ain and -Ain inputs will spend half their
time below the negative supply rail, which will royally screw up the
operation of the AD698 as a whole - charge carriers injected by via
the substrate diodes tend to end up in unpredictable areas of the
circuit and can have surprising effects.


In fact you see from image 108 that the output sine wave has a dc
offset, so it doens't go below the supply rail.

Your circuit diagram for this area duplicates the data sheet circuit
diagram for single supply operation, which relies on a 1M resistor to
bias floating secondaries into a safe operating area, but it doesn't
explicitly show the LVDT connections, which might - for instance -
ground the centre tap of the opposed secondaries to a grounded shield
(which is what I've done in the past).


I double checked the connections and seems ok.

Looking at the outputs of the secondies at +Ain and -Ain with a DC-
coupled scope probe - or even a multimeter to get the actual average
DC level - might be worht the trouble.


I'm sorry, I don't understand what you're suggesting here.

Something like this would explain why the A-demodulator output (image
109) looks unbalanced, as if one side of teh waveform is being clipped
before it is demodulated.


Thank you, Bill
Marco
 
M

Marco Trapanese

Jan 1, 1970
0
Il 13/10/2011 18:35, Bill Sloman ha scritto:
I can't see anything about absolute voltage levels in image 108.
There's absolute no zero reference anywhere on the screen. There are
two unidentified arrow markers on the right and left sides of the
image. You appear to be telling me that the left hand arow is the 0V
marker and the right-hand marker the DC offset. What does the "CH1 /
5.6V" data represent?


The left arrow is the zero reference, that is at the middle of the
vertical axis. 5V per division, so the dc offset is slightly over 5V.

So the sine wave is a nice 5.5 kHz of about 9.6Vpk-pk and about 5V dc
offset.

The right arrow set the trigger value (5,60V falling edge). Is the
standard simbology of Tektronix TDS series.

I apologize if I didn't explain that before.

You want to make sure of the absolute DC voltage range actually being
applied to the +Ain input and the -Ain input.


Ok I got it.
Wait a minute and I'll check that :)

..
..
..
..

At maximum displacement:

+Ain dc offset: about 5.47 V
-Ain dc offset: about 5.50 V

Here the two signals:

+Ain
http://img840.imageshack.us/img840/9171/img112u.jpg

-Ain
http://img207.imageshack.us/img207/7091/img113h.jpg

The second one goes 0.7V below supply rail. Moving the lvdt the
amplitude of the sine wave goes towards zero but the lowest side of the
wave is still slightly negative.

This may clarify something?

Marco
 
M

Marco Trapanese

Jan 1, 1970
0
Il 13/10/2011 22:55, Bill Sloman ha scritto:
The scope says that the signals have RMS values of 6.44V and 5.9V
respectively.

The AD698 data sheet sets an upper limit of 3.5V rms on the A and B
signal inputs. You are over-driving the inputs. Unsurprisingly, the
chip isn't reacting as it would to within-specification inputs.


My fault was to calculate the rms value of the sine wave without
considering the dc offset! That's why I set the oscilloscope in AC mode!
I thought the chip will handle the common mode because the excitation
sine wave is centered at vsupply / 2 regardless its own amplitude.

This should be easy to fix, but you may need to replace the AD698 chip
once you've re-engineered the signal levels down to values that the
chip can handle.


I hope my AD698 is still alive beacuse I don't have another in my drawer!

I've just replaced the R1 (R14 in my sch) with a 10k. Now the sine wave
has a lower amplitude but the rms value is still over 12V because it has
a Vsupply / 2 offset, as I said before.

I cannot reach a 3.5V rms on Binput in this way!
I have the divider on-board, but it shouldn't be used unless you want to
overdrive the lvdt.

Thank you again! You're helping me a lot to understand this circuit.

Marco
 
M

Marco Trapanese

Jan 1, 1970
0
Il 14/10/2011 12:19, Bill Sloman ha scritto:
The sine wave driving the primary of the LVDT is going to be centred
at Vsupply/2, and won't give you any problems.


It's directly connected to Binputs! So it is *always* greater than 3.5V rms.

The sine wave coming out of the - galvanically isolated - secondaries
can be bigger (have a higher peak-peak-to-peak voltage swing) than the
excitation waveform going into the primary, and it's DC offset depends
on what you've done with the secondary connections.

If you tied the centre-tap of the secondaries to Vsupply/2 you'd at
least know what was going on.


At the moment the problem is still on the primary: the excitation
voltage is applied to Binputs and it doesn't respect the specifications.

The Analog Devices single supply example circuit just relies on a 1M
resistor to ground to set up the DC conditions. If you overdrive the
+/-Ain inputs - as you appear to have been doing - one of the
waveforms has to dip below 0V to pick up the matching charge to
compensate for the being driven into the input that you've driven into
avalanche breakdown.

Ok.


The primary excitation voltage doesn't matter, of it itself. What's
important is the maximum voltage difference that it sets up across the
LVDT secondaries and thus the +/-Ain inputs. This seems to be too high
- high enough to drive (or have driven) the A inputs into avalanche
breakdown at some point, which is presumably why one of the A inputs
is now swinging below 0v to collect enough charge to make up for that
being driven into the ADS698 chip on a positive peak.


I will try to reduce again the excitation voltage (and thus the
secondary one).

The last thing I'm asking to explain me is why you don't mind the
Binputs voltage range.

Marco
 
M

Marco Trapanese

Jan 1, 1970
0
Il 14/10/2011 16:37, Bill Sloman ha scritto:
It's obviously got to be limited - just like the signal going into the
A inputs (as it says on page 2 of the data sheet) - but the outputs
are coming from the chip itself, and the data sheet has told you that
you have to limit the AC content of the signal hititng the B inputs to
less than 3.5V rms, so I was figuring that since you did read the
datat sheet, you wouldn't have forgotten to take this into account.


Sorry, we'are talking about different things. I say:

1) Because the exc sine wave has a dc offset of Vs / 2, it *cannot* have
a V rms < Vs / 2 (and Vs must be >= 13 V)

2) Given the point 1) the voltage divider *must be used always*, not
only in some circumnstances! But none of the schematics show the divider!

Anyway, I'm going to setup the divider to achieve the correct input voltage.
Let's see what happens.

Bye
Marco
 
M

Marco Trapanese

Jan 1, 1970
0
Il 14/10/2011 21:52, Bill Sloman ha scritto:

I look forward to hearing how it turns out.


Bill,

I tried with the voltage divider but it just reduced the amplitude of
all signals.

However, I'm close to solve the problem thanks a hint read on a forum.
The A input should be polarized at Vs / 2 too. In fact, adding another
1M resistor between -Ain and +Vs moves the dc offset of A channel to 12V.

Now I see two dc voltages at both A and B filter output. The A filter
slightly changes with lvdt displacement.

This variation is very small: about 150 mV.
I measured the phase difference between the primary and secondary of the
lvdt and I found it's about 5.4°.

I think the synchronous demodulator is not working because it has a
shifted reference signal. Unfortunately I can't add the lead/lag
compensation network on my PCB.

So I'm going to mount the whole front-end on a prototype board to verify
if compensating the phase difference leads the AD698 to work properly.

I thank you very much for your patience.
Marco
 
M

Marco Trapanese

Jan 1, 1970
0
Il 17/10/2011 18:39, Bill Sloman ha scritto:
It's more likely that it isn't working because you blew it up by
putting excessive voltage differences between the A+/A- and B+/B-
inputs.
It won't make much difference - 5.4° is almost negligible.


Solved.
You're right about the phase difference, it doens't matter.

The problem of the small output change was related to the signal
reference voltage. It was too low. With single supply it's not possible
to achieve a 0-5V output. The ds characterize the voltage range only for
dual-supply but using the lower rail and 0V you can see the swing limits.

Raising the signal reference voltage to Vs / 2 provides full swing. Now
I have to find the best values to fit my application but fortunately the
AD698 didn't blow up!

Bye
Marco
 
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