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A new concept for AGC

Discussion in 'Electronic Design' started by Ban, Sep 4, 2003.

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  1. Ban

    Ban Guest

    In some recent threads here and in ABSE had been discussed the control
    algorithm of a compressor, and NT has rightly pointed out some problematic
    issues with the peak/hold and very long time constants.
    Johns idea with varying on/off times has triggered the time_division
    technique for multiplying in me, but here it is used to discharge the hold
    capacitor at a fixed rate.

    input Vin | divider | output
    o+------------------------------+x x/z+-+--o
    | | | |
    | | | |
    | .----------. .----------. | z | |
    | | | | | '------+-----' |
    | | fullwave | |peak/hold | _______ | |
    +-+ rectifier+--+ +-|Vinpeak|+ |
    | | |tau=5s | |
    | | release time |
    '----------' '-----+----' |
    | |
    .-----------. on/off |
    | triangle | | |
    +-+ generator | | |
    | | 0.1....1V | | |
    | '-----------' | |
    | | |
    | .-----------. | |
    | | comparator| | |
    +-+ + +-------+ |
    | | |
    +-+ - | |
    | '-----------' .---------. .--------. |
    | | average | rectifier| |
    +-------------------+ +----+ |-+ _______
    ___ _______ | tau=5s | | | Vin/|Vinpeak|
    |Vin|/|Vinpeak| '---------' '--------'

    Here the detail about discharging the cap with an inverted BJT to avoid the
    jfet, expensive and more difficult to obtain.
    +--+-------+---------| >--
    | | |/
    | .-.
    4u7 | + | |
    ### | |1M
    --- '-'
    hold| |
    cap | | TTL-level
    | <| ___
    === NPN |--|___|-o
    GND /| 10k
    created by Andy´s ASCII-Circuit v1.24.140803 Beta

    comments are really welcome
    ciao Ban
  2. Jim Thompson

    Jim Thompson Guest

    Why not an open drain CMOS inverter or gate, or a CMOS analog switch?

    I once built an analog AGC using a CdS photocell (variable resistance
    with light) and a lamp. Gives nice smooth response.

    ...Jim Thompson
  3. N. Thornton

    N. Thornton Guest

    Hi Ban.

    This looks to me like it would help. My only suggestion is I cant help
    thinking there may be a simpler way to get the V_out controlling the
    time constant. More along the linse of using a fet as the discharge R
    with analog applied to its gate, via an amplifying tr if necessary.

    One other trick that looks like its been missed is that of having a
    variable gain stage outside the loop. With everything in the loop you
    can never get proper agc action because changes in output level are
    the only cause for the circuit to adjust its gain. So to function it
    has to output varying levels. The solution is an additional adjustable
    gain stage after the control loop.

    While we're here, does anyone have any other approaches to doing agc?

    I have one I havent mentioned, but its not too useful. Just Putting
    signal thru a miniature filament lamp can give a fair amount of agc,
    with a fixed R to form a potential divider.

    I hope there are more interesting techniques out there.

    Regards, NT
  4. John F.

    John F. Guest

    For AGC, don't take the control feedback from the output but from the input.
    Otherwise you only do low compression not auto gain which is infinite
  5. Ban

    Ban Guest

    But this circuit takes the control from the input and can have infinite

    The voltage from the output just helps me to save another division.
    The peak/hold sets its output voltage which is the divider Vz according to
    the voltage peaks of the input voltage.
    First the lower part was missing and NT critisized the forever time constant
    until a glitch at the input or a very small volume source switched in would

    So I thought to use the ratio of Vpeak/Vavg to control the time constant
    resp. adaption speed of the gain. When there is a normal programm the ratio
    would be between 1.3 and 2, But when an incident like before occurred the
    ratio gets much bigger. We can use this value to control the discharge of
    the hold capacitor.

    Look at the case after the loud channel we choose an input with -20dB
    instead of before. The peak capacitor is still charged, but the output
    has -20dB now, so the average value lowers and the ratio goes up discharging
    the cap in 1/10 of the normal time until the gain has come up sufficiently.

    Now when I take the output signal I already have the division, only need to
    average and unfortunately to 1/x, which is done as a multiplication with
    numbers <1 .

    There can be a deadband, when the ratio is below 2, the time constant can be
    infinite. So no small corrections are made. Our ears are not that sensitive
    to volume changes, 3dB can just be heard.

    The switching frequency can be 30kHz or higher. This would cause very little
    ripple on the control voltage and thus modulating the audio signal.

    ciao Ban
  6. N. Thornton

    N. Thornton Guest

    Hi Ban.

    Can I ask you to put arrows on all your paths in your diagram? I think
    that's needed as there are too many unknowns otherwise. I see I made
    different assumptions about the paths than you intended.

    Thanks, NT
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