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40106 output current capability?

Discussion in 'General Electronics Discussion' started by rogerk8, Oct 14, 2013.

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  1. rogerk8


    Jul 28, 2011

    I am confused.

    The datasheet says that at Vcc=5V the output current is maximum +/-0,5mA.

    Doing a live test on two units from different batches yields almost +/[email protected] You can however push the negative swing to almost [email protected] and the positive swing to some [email protected] but somewhere around there the CMOS-output is saturated.

    1k seem to be a suitable maximum load and the unit then gives at least +/-4mA.

    This means that Voh=4V and Vol=1V @1k

    I wonder how this can be? Why does the datasheet say otherwise?

    I can almost push the limit 10-fold beyond what it says!

    Thankful for any comment.

    Best regards, Roger
  2. BobK


    Jan 5, 2010
    If you look more closely at that table, there is a column titled "conditions" In this table, it list the output voltage as 4.6V to get -0.5ma of output current. Yes, you can get more current out, but that it the current that can be guaranteed when the output voltage is 4.6V. At higher currents, the output voltage will be lower.

  3. rogerk8


    Jul 28, 2011
    Thank you Bob for your answer!

    I did however see that. But my tests show that at 4.0V you can actually get -4mA out.

    And this is still a well-defined "High Level".

    I think this is far better than the datasheet displays.

    Best regards, Roger
  4. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

    Jan 21, 2010
    The datasheets give you a conservative figure which is either very likely to be true, or even guaranteed to be true for every device, at all temperatures, and under whatever other adverse conditions that might exist. They tend to tell you how bad the device could be.

    One of the variables is the "goodness" of the mosfets in the output of the gate. If they have a slightly higher Vgs(th) or a slightly higher Rds then you may not get the current you measure from this device from another device. The variation of characteristics of mosfets is fairly wide, so specification of limits will be at points significantly away from the typical value. If you have a datasheet which specified typical and maximum values, then you can get a good handle on how wide that spread is.

    Also, there is a significant difference between 4.6V and 4V. The fact that you choose a different Voh(min) than the manufacturer does not make their assessment wrong.

    Because of all of this, you'll find that the actual capabilities of a chip tend to be better than the specifications suggest because only a very small (statistically zero) proportion are allowed to fall outside the specified values.

    What you're seeing is expected, and also a good argument for not relying on datasheet specifications like this to (for example) decide a current limiting resistor for a LED is not required.
  5. rogerk8


    Jul 28, 2011
    Thank you Steve for this detailed information!

    Best regards, Roger
  6. KrisBlueNZ

    KrisBlueNZ Sadly passed away in 2015

    Nov 28, 2011
    Steve, do you think it's very likely that modern CD400x devices would give better average performance than the original data sheets state because of process improvements?
  7. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

    Jan 21, 2010
    In one respect I'd say it's certain. Where the specifications are for minimum values then, almost by definition, the average must be better.

    Where the datasheets provide a typical value, I would expect that process improvements would tend to reduce variability so the grouping around the average would tighten. Whether this grouping would coincide with the "typical" figures listed in the datasheet, it would be hard to know unless you were the manufacturer and had access to testing data.

    However, I think it unlikely that there would be any major shift to (say) gates being able to deliver 100mA instead of 10mA when short circuited for two reasons:

    1) There are line driver chips designed to do that already
    2) It is not inconceivable that a change like this would render some circuits inoperable.
    3) It seems unlikely that such a change could come from purely process improvement and there is no particular need (that I'm aware of) to redesign these chips (and if you did, why would you change this?)

    In a sense, many of the specifications are quite conservative. One that comes to mind is the maximum frequency of operation (that you can deduce from rise and fall times) of logic gates. One application note (AN-118) shows a simple oscillator, a ring of three (or more, but odd number of) inverters. The frequency of oscillation is determined not only by the output resistance and the capacitance of the input, but by propagation delays and rise/fall times. The calculation of frequency for 3 gates comes out to 9.8MHz, but the application note suggests that frequencies of around 16MHz are seen in real life. This is even more surprising since I'm fairly sure the calculations don't add an allowance for stray capacitances.

    One could repeat that test using more modern components and see what frequency you get. (even better if you have some samples of older chips). Are modern chips faster overall, or more tightly grouped?
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