Maker Pro
Maker Pro

2 pulses from 1

T

Terry Pinnell

Jan 1, 1970
0
I'm sure there must be a smarter way to do this than my first design.
I want to produce separate +ve going 12V pulses at the leading and
trailing edges of a low impedance 12V input.

My first draft looks too complex:

- Use R/C/diode edge detector to produce OUT 1.
- Also take input to half a 4013 to produce FF
- Logic NOR the input with the inverted FF
- Use R/C/diode edge detector to produce OUT 2

Here's the timing chart:
http://www.terrypin.dial.pipex.com/Images/2From1.gif

I think those crude output pulses should be adequate without further
cleaning up, as they go to the respective Set and Reset inputs of a
simple 4001 bistable. Of course, squared up outputs would be a bonus;
I might do that anyway if I have any spare 4001 gates.

For the curious, it's an add-on for my curtain controller, to open and
close them either at dawn/dusk or at specific times of day.

Any simpler way to achieve this please?
 
K

Ken Moffett

Jan 1, 1970
0

Terry,
Someplace in the past I remember using an edge detecter circuit for the
count output of a rotory encoder. I think it was from one of the "Design
Ideas" in Electronic Design(?). It used an XOR gate with an RC delay on
one of the two inputs. The other input was direct. The output pulse
width was a function of the RC time constant.






-- --- - -
| | | | || || || ||
--- --- XOR -- --- --- -- ---
__
---+----------------| |
| ___ | |-------
+---|___|---+----|__|
|
---
---
|
---------------+---------------


Edge Detector
created by Andy´s ASCII-Circuit v1.24.140803 Beta www.tech-chat.de
 
F

Fred Bloggs

Jan 1, 1970
0
Terry said:
I'm sure there must be a smarter way to do this than my first design.
I want to produce separate +ve going 12V pulses at the leading and
trailing edges of a low impedance 12V input.

My first draft looks too complex:

- Use R/C/diode edge detector to produce OUT 1.
- Also take input to half a 4013 to produce FF
- Logic NOR the input with the inverted FF
- Use R/C/diode edge detector to produce OUT 2

Here's the timing chart:
http://www.terrypin.dial.pipex.com/Images/2From1.gif

I think those crude output pulses should be adequate without further
cleaning up, as they go to the respective Set and Reset inputs of a
simple 4001 bistable. Of course, squared up outputs would be a bonus;
I might do that anyway if I have any spare 4001 gates.

For the curious, it's an add-on for my curtain controller, to open and
close them either at dawn/dusk or at specific times of day.

Any simpler way to achieve this please?

View in a fixed-width font such as Courier.




4070_
+----------------\ \ \
| | | >--+------>OUTN
| |\ +-/ /__/ | |\
IN>---+-[R]-+--| o --+ +-| o-->OUTP
| |/ |/
[C] 40106 40106
|
|
---


------------
| |
| |
IN ------- -----------


------- --------- -------
| | | |
OUTN | | | |
-- --

~0.7RC
-- --
->| |<- | |
OUTP | | | |
------- --------- ------
 
F

Fred Bartoli

Jan 1, 1970
0
Terry Pinnell said:
I'm sure there must be a smarter way to do this than my first design.
I want to produce separate +ve going 12V pulses at the leading and
trailing edges of a low impedance 12V input.

My first draft looks too complex:

- Use R/C/diode edge detector to produce OUT 1.
- Also take input to half a 4013 to produce FF
- Logic NOR the input with the inverted FF
- Use R/C/diode edge detector to produce OUT 2

Here's the timing chart:
http://www.terrypin.dial.pipex.com/Images/2From1.gif

I think those crude output pulses should be adequate without further
cleaning up, as they go to the respective Set and Reset inputs of a
simple 4001 bistable. Of course, squared up outputs would be a bonus;
I might do that anyway if I have any spare 4001 gates.

For the curious, it's an add-on for my curtain controller, to open and
close them either at dawn/dusk or at specific times of day.

Any simpler way to achieve this please?

Terry,

You want separate positive pulses for your NOR RS bistable.

If your 12 pulses are clean, you can do this:

10K
___
.-|___|-+------+-----VDD
| | |
1K 1n | | |
12V ___ || | | |<
-|___|--||--+-------|----|
pulse || | | |\
| | |
|-----' |
/| |
| |
Set <-----+ +-----> Reset
| |
.-. .-.
| | | |
| | | |
'-' '-'
| |
| |
=== ===
GND GND
(created by AACircuit v1.28 beta 10/06/04 www.tech-chat.de)

Adjust the 1K 1n time constant to your taste.
 
F

Fred Bloggs

Jan 1, 1970
0
Terry said:
I'm sure there must be a smarter way to do this than my first design.
I want to produce separate +ve going 12V pulses at the leading and
trailing edges of a low impedance 12V input.

My first draft looks too complex:

- Use R/C/diode edge detector to produce OUT 1.
- Also take input to half a 4013 to produce FF
- Logic NOR the input with the inverted FF
- Use R/C/diode edge detector to produce OUT 2

Here's the timing chart:
http://www.terrypin.dial.pipex.com/Images/2From1.gif

I think those crude output pulses should be adequate without further
cleaning up, as they go to the respective Set and Reset inputs of a
simple 4001 bistable. Of course, squared up outputs would be a bonus;
I might do that anyway if I have any spare 4001 gates.

For the curious, it's an add-on for my curtain controller, to open and
close them either at dawn/dusk or at specific times of day.

Any simpler way to achieve this please?

This should be more in line with what you want:
View in a fixed-width font such as Courier.




4070_
+----------------\ \ \
| | | >--+------>OUTN
| |\ +-/ /__/ | |\
IN>---+-[R]-+--| o --+ +-| o-->OUTP
| |/ |/
[C] 40106 40106
|
|
---


------------
| |
| |
IN ------- -----------


------- --------- -------
| | | |
OUTN | | | |
-- --

~0.7RC
-- --
->| |<- | |
OUTP | | | |
------- --------- ------



+--------------------------+ 4001
| _ +-\ \
+----------------\ \ \ | o-->OUTNN
| | | >-+---/__/
| |\ +-/ /__/ |
IN>---+-[R]-+--| o --+ 4070 |
| | |/ |
| [C] 40106 |
| | |
| | |
| --- |
| | 4011
| | __
+----------------------------| \ |\
| | o-| o --->OUTPP
+---|__/ |/
40106

------------
| |
| |
IN ------- -----------

~0.7RC
--
->| |<-
OUTNN | |
-------------------- -------

~0.7RC
 
F

Fred Bloggs

Jan 1, 1970
0
Fred Bloggs wrote:
scratch that- do this:
View in a fixed-width font such as Courier.




4070_
+----------------\ \ \
| | | >--+------>OUTN
| |\ +-/ /__/ | |\
IN>---+-[R]-+--| o --+ +-| o-->OUTP
| |/ |/
[C] 40106 40106
|
|
---


------------
| |
| |
IN ------- -----------


------- --------- -------
| | | |
OUTN | | | |
-- --

~0.7RC
-- --
->| |<- | |
OUTP | | | |
------- --------- ------



+--------------------------+ 4001
| _ +-\ \
+----------------\ \ \ | o-->OUTNN
| | | >-+---/__/
| |\ +-/ /__/ |
IN>---+-[R]-+--| o --+ 4070 |
| | |/ |
| [C] 40106 |
| | |
| | |
| --- |
| |
| |\ | 4001
+------------| o ------------\ \
|/ | | o-->OUTPP
40106 +---/__/


------------
| |
| |
IN ------- -----------

~0.7RC
--
->| |<-
OUTNN | |
-------------------- -------

~0.7RC
 
F

Fred Bloggs

Jan 1, 1970
0
I'm sure there must be a smarter way to do this than my first design.
I want to produce separate +ve going 12V pulses at the leading and
trailing edges of a low impedance 12V input.

My first draft looks too complex:

- Use R/C/diode edge detector to produce OUT 1.
- Also take input to half a 4013 to produce FF
- Logic NOR the input with the inverted FF
- Use R/C/diode edge detector to produce OUT 2

Here's the timing chart:
http://www.terrypin.dial.pipex.com/Images/2From1.gif

I think those crude output pulses should be adequate without further
cleaning up, as they go to the respective Set and Reset inputs of a
simple 4001 bistable. Of course, squared up outputs would be a bonus;
I might do that anyway if I have any spare 4001 gates.

For the curious, it's an add-on for my curtain controller, to open and
close them either at dawn/dusk or at specific times of day.

Any simpler way to achieve this please?

It may be better to make a slow XOR to avoid race, and if that RC is
short like <1us then you can substitute any inverter for a Schmitt- so a
workable circuit using two common IC's would be:
View in a fixed-width font such as Courier.

..
.. +--------------------------------------------+ 4001
.. | __ +-\ \
.. +-------------+------------| \ | o-->OUTNN
.. | | | o --+ +-/__/
.. | | +--|__/ | |
.. IN>---+ | __ | | __ |
.. | +--| \ | +--| \ |
.. | | o--+ 4011 | o -+
.. | +--|__/ | +--|__/ |
.. | | | __ | |
.. | | +--| \ | |
.. | |\ | | o --+ |
.. +-[R]-+--| o -+------------|__/ |
.. | | |/ |
.. | [C] 4001 |
.. | | |
.. | | |
.. | --- |
.. | |\ | 4001
.. +--------| o ----------------------------------\ \
.. |/ | | o-->OUTPP
.. 4001 +-/__/
..
..
..
..
.. ------------
.. | |
.. | |
.. IN ------- -----------
..
.. ~0.7RC
.. --
.. ->| |<-
.. OUTNN | |
.. -------------------- -------
..
.. ~0.7RC
.. --
.. ->| |<-
.. OUTPP | |
.. ------- -------------------
..
..
..
 
T

Terry Pinnell

Jan 1, 1970
0
It may be better to make a slow XOR to avoid race, and if that RC is
short like <1us then you can substitute any inverter for a Schmitt- so a
workable circuit using two common IC's would be:
View in a fixed-width font such as Courier.

.
. +--------------------------------------------+ 4001
. | __ +-\ \
. +-------------+------------| \ | o-->OUTNN
. | | | o --+ +-/__/
. | | +--|__/ | |
. IN>---+ | __ | | __ |
. | +--| \ | +--| \ |
. | | o--+ 4011 | o -+
. | +--|__/ | +--|__/ |
. | | | __ | |
. | | +--| \ | |
. | |\ | | o --+ |
. +-[R]-+--| o -+------------|__/ |
. | | |/ |
. | [C] 4001 |
. | | |
. | | |
. | --- |
. | |\ | 4001
. +--------| o ----------------------------------\ \
. |/ | | o-->OUTPP
. 4001 +-/__/
.
.
.
.
. ------------
. | |
. | |
. IN ------- -----------
.
. ~0.7RC
. --
. ->| |<-
. OUTNN | |
. -------------------- -------
.
. ~0.7RC
. --
. ->| |<-
. OUTPP | |
. ------- -------------------
.

Thanks for those prompt replies. Will experiment with each suggestion.

BTW, remember that IN period is *hours*, and output pulses can be
virtually any duration - say 10 ms for discussion - so fast pulse
issues don't arise.
 
F

Fred Bloggs

Jan 1, 1970
0
Terry said:
It may be better to make a slow XOR to avoid race, and if that RC is
short like <1us then you can substitute any inverter for a Schmitt- so a
workable circuit using two common IC's would be:
View in a fixed-width font such as Courier.

.
. +--------------------------------------------+ 4001
. | __ +-\ \
. +-------------+------------| \ | o-->OUTNN
. | | | o --+ +-/__/
. | | +--|__/ | |
. IN>---+ | __ | | __ |
. | +--| \ | +--| \ |
. | | o--+ 4011 | o -+
. | +--|__/ | +--|__/ |
. | | | __ | |
. | | +--| \ | |
. | |\ | | o --+ |
. +-[R]-+--| o -+------------|__/ |
. | | |/ |
. | [C] 4001 |
. | | |
. | | |
. | --- |
. | |\ | 4001
. +--------| o ----------------------------------\ \
. |/ | | o-->OUTPP
. 4001 +-/__/
.
.
.
.
. ------------
. | |
. | |
. IN ------- -----------
.
. ~0.7RC
. --
. ->| |<-
. OUTNN | |
. -------------------- -------
.
. ~0.7RC
. --
. ->| |<-
. OUTPP | |
. ------- -------------------
.


Thanks for those prompt replies. Will experiment with each suggestion.

BTW, remember that IN period is *hours*, and output pulses can be
virtually any duration - say 10 ms for discussion - so fast pulse
issues don't arise.

Right- but I was talking about the fact that IN has to beat the XOR to
the output NOR inputs each time to prevent things like OUTNN producing a
sliver of a transient at the positive IN edge and OUTPP doing likewise
at a negative IN edge- I have not checked the 4070 Tpd's- but using a
quad NAND for this function gets you a two gate margin. I would make
that RC more like 1us- more than enough duration at your higher power
supply voltage.
 
T

Tim Hubberstey

Jan 1, 1970
0
Terry said:
I'm sure there must be a smarter way to do this than my first design.
I want to produce separate +ve going 12V pulses at the leading and
trailing edges of a low impedance 12V input.

My first draft looks too complex:

- Use R/C/diode edge detector to produce OUT 1.
- Also take input to half a 4013 to produce FF
- Logic NOR the input with the inverted FF
- Use R/C/diode edge detector to produce OUT 2

Here's the timing chart:
http://www.terrypin.dial.pipex.com/Images/2From1.gif

I think those crude output pulses should be adequate without further
cleaning up, as they go to the respective Set and Reset inputs of a
simple 4001 bistable. Of course, squared up outputs would be a bonus;
I might do that anyway if I have any spare 4001 gates.

For the curious, it's an add-on for my curtain controller, to open and
close them either at dawn/dusk or at specific times of day.

Any simpler way to achieve this please?

I'm almost reluctant to say this since it seems to be the answer to so
many simple projects: use an 8-pin PIC or other similar microcontroller
(uC).

There are other considerations that are not addressed by a simple edge
detector. I'm assuming your input comes from a photo-detector of some
kind so your edges are probably very slow and subject to "chatter".
Further, you probably don't want to trigger if a shadow from a bird
passes over the sensor during the day, or a headlight beam hits it at
night. This means you need to debounce the input before edge detection.
This all adds up to extra components if you do it in the analog world.

Using a uC with an internal clock, you need only the uC and perhaps an
input clamp. Plus you can easily vary the width of your output pulse or
delay one edge if you want (if you find you'd prefer an hour after dawn,
for instance).
 
J

John Fields

Jan 1, 1970
0
Terry said:
It may be better to make a slow XOR to avoid race, and if that RC is
short like <1us then you can substitute any inverter for a Schmitt- so a
workable circuit using two common IC's would be:
View in a fixed-width font such as Courier.

.
. +--------------------------------------------+ 4001
. | __ +-\ \
. +-------------+------------| \ | o-->OUTNN
. | | | o --+ +-/__/
. | | +--|__/ | |
. IN>---+ | __ | | __ |
. | +--| \ | +--| \ |
. | | o--+ 4011 | o -+
. | +--|__/ | +--|__/ |
. | | | __ | |
. | | +--| \ | |
. | |\ | | o --+ |
. +-[R]-+--| o -+------------|__/ |
. | | |/ |
. | [C] 4001 |
. | | |
. | | |
. | --- |
. | |\ | 4001
. +--------| o ----------------------------------\ \
. |/ | | o-->OUTPP
. 4001 +-/__/
.
.
.
.
. ------------
. | |
. | |
. IN ------- -----------
.
. ~0.7RC
. --
. ->| |<-
. OUTNN | |
. -------------------- -------
.
. ~0.7RC
. --
. ->| |<-
. OUTPP | |
. ------- -------------------
.


Thanks for those prompt replies. Will experiment with each suggestion.

BTW, remember that IN period is *hours*, and output pulses can be
virtually any duration - say 10 ms for discussion - so fast pulse
issues don't arise.

Right- but I was talking about the fact that IN has to beat the XOR to
the output NOR inputs each time to prevent things like OUTNN producing a
sliver of a transient at the positive IN edge and OUTPP doing likewise
at a negative IN edge- I have not checked the 4070 Tpd's- but using a
quad NAND for this function gets you a two gate margin. I would make
that RC more like 1us- more than enough duration at your higher power
supply voltage.

---
What's wrong with the old standard way of doing it?


IN>-----+-----------A
| 4070 Y---->OUT
+--[R]--+---B
|
[C]
|
GND>------------+


_______________
IN _____| |__________

_ _
OUT_____| |_____________| |________
 
T

Terry Pinnell

Jan 1, 1970
0
Tim Hubberstey said:
I'm almost reluctant to say this since it seems to be the answer to so
many simple projects: use an 8-pin PIC or other similar microcontroller
(uC).

Extreme overkill IMO, and that's even *if* I had:
- the parts to hand
- the programming skills necessary
- the time to remind myself how to use the programmer
There are other considerations that are not addressed by a simple edge
detector. I'm assuming your input comes from a photo-detector of some
kind so your edges are probably very slow and subject to "chatter".
Further, you probably don't want to trigger if a shadow from a bird
passes over the sensor during the day, or a headlight beam hits it at
night. This means you need to debounce the input before edge detection.
This all adds up to extra components if you do it in the analog world.

The dawn/dusk detector is based on an LDR, but via a Schmitt with
hysteresis, so those problems don't arise. The second input option I
mentioned will come from a plain mains-based programmable timer, and
I'll ensure it delivers clean 12V pulses to the pulse-generating
circuit.
Using a uC with an internal clock, you need only the uC and perhaps an
input clamp. Plus you can easily vary the width of your output pulse or
delay one edge if you want (if you find you'd prefer an hour after dawn,
for instance).

Versus a couple of chips and a few passives - come on! OK, it
certainly offers more versatility (not particularly important in this
application), but I think every other factor weighs against a PIC
approach here. Even my ponderous design takes only 6 passives plus 2
dirt cheap ICs. And some of the other recommendations, for which
detailed schematics have been posted up-thread, are much simpler.

I appreciate your good intentions, but, like quite a few posters,
you've tacitly assumed everyone here knows PICs and works with them
every day. Although I still have that as a goal, unhappily I haven't
achieved it yet! <g>
 
F

Fred Bloggs

Jan 1, 1970
0
John said:
Terry said:
It may be better to make a slow XOR to avoid race, and if that RC is
short like <1us then you can substitute any inverter for a Schmitt- so a
workable circuit using two common IC's would be:
View in a fixed-width font such as Courier.

.
. +--------------------------------------------+ 4001
. | __ +-\ \
. +-------------+------------| \ | o-->OUTNN
. | | | o --+ +-/__/
. | | +--|__/ | |
. IN>---+ | __ | | __ |
. | +--| \ | +--| \ |
. | | o--+ 4011 | o -+
. | +--|__/ | +--|__/ |
. | | | __ | |
. | | +--| \ | |
. | |\ | | o --+ |
. +-[R]-+--| o -+------------|__/ |
. | | |/ |
. | [C] 4001 |
. | | |
. | | |
. | --- |
. | |\ | 4001
. +--------| o ----------------------------------\ \
. |/ | | o-->OUTPP
. 4001 +-/__/
.
.
.
.
. ------------
. | |
. | |
. IN ------- -----------
.
. ~0.7RC
. --
. ->| |<-
. OUTNN | |
. -------------------- -------
.
. ~0.7RC
. --
. ->| |<-
. OUTPP | |
. ------- -------------------
.


Thanks for those prompt replies. Will experiment with each suggestion.

BTW, remember that IN period is *hours*, and output pulses can be
virtually any duration - say 10 ms for discussion - so fast pulse
issues don't arise.

Right- but I was talking about the fact that IN has to beat the XOR to
the output NOR inputs each time to prevent things like OUTNN producing a
sliver of a transient at the positive IN edge and OUTPP doing likewise
at a negative IN edge- I have not checked the 4070 Tpd's- but using a
quad NAND for this function gets you a two gate margin. I would make
that RC more like 1us- more than enough duration at your higher power
supply voltage.


---
What's wrong with the old standard way of doing it?


IN>-----+-----------A
| 4070 Y---->OUT
+--[R]--+---B
|
[C]
|
GND>------------+


_______________
IN _____| |__________

_ _
OUT_____| |_____________| |________

Nothing- he wants those pulses separated out- the IN + edge pulse to one
output, and IN - edge pulse to another channel.
 
R

Rich Grise

Jan 1, 1970
0
John said:
What's wrong with the old standard way of doing it?


IN>-----+-----------A
| 4070 Y---->OUT
+--[R]--+---B
|
[C]
|
GND>------------+


_______________
IN _____| |__________

_ _
OUT_____| |_____________| |________

Nothing- he wants those pulses separated out- the IN + edge pulse to one
output, and IN - edge pulse to another channel.

Then just differentiate the square, and pick off the negative-going
polarity with an inverter. Clamp them both, of course.

Cheers!
Rich
 
J

John Fields

Jan 1, 1970
0
John said:
Terry Pinnell wrote:





It may be better to make a slow XOR to avoid race, and if that RC is
short like <1us then you can substitute any inverter for a Schmitt- so a
workable circuit using two common IC's would be:
View in a fixed-width font such as Courier.

.
. +--------------------------------------------+ 4001
. | __ +-\ \
. +-------------+------------| \ | o-->OUTNN
. | | | o --+ +-/__/
. | | +--|__/ | |
. IN>---+ | __ | | __ |
. | +--| \ | +--| \ |
. | | o--+ 4011 | o -+
. | +--|__/ | +--|__/ |
. | | | __ | |
. | | +--| \ | |
. | |\ | | o --+ |
. +-[R]-+--| o -+------------|__/ |
. | | |/ |
. | [C] 4001 |
. | | |
. | | |
. | --- |
. | |\ | 4001
. +--------| o ----------------------------------\ \
. |/ | | o-->OUTPP
. 4001 +-/__/
.
.
.
.
. ------------
. | |
. | |
. IN ------- -----------
.
. ~0.7RC
. --
. ->| |<-
. OUTNN | |
. -------------------- -------
.
. ~0.7RC
. --
. ->| |<-
. OUTPP | |
. ------- -------------------
.


Thanks for those prompt replies. Will experiment with each suggestion.

BTW, remember that IN period is *hours*, and output pulses can be
virtually any duration - say 10 ms for discussion - so fast pulse
issues don't arise.


Right- but I was talking about the fact that IN has to beat the XOR to
the output NOR inputs each time to prevent things like OUTNN producing a
sliver of a transient at the positive IN edge and OUTPP doing likewise
at a negative IN edge- I have not checked the 4070 Tpd's- but using a
quad NAND for this function gets you a two gate margin. I would make
that RC more like 1us- more than enough duration at your higher power
supply voltage.


---
What's wrong with the old standard way of doing it?


IN>-----+-----------A
| 4070 Y---->OUT
+--[R]--+---B
|
[C]
|
GND>------------+


_______________
IN _____| |__________

_ _
OUT_____| |_____________| |________

Nothing- he wants those pulses separated out- the IN + edge pulse to one
output, and IN - edge pulse to another channel.
 
Is the contest still open? Here's my entry:


.. +12v
.. _
.. |
.. R1 |
.. +----/\/\/\------*----------+
.. C1 | | |
.. | Q1 / |
.. | | | PNP |e |
.. >-----+ +---*-------------|-------\ |
.. | | |\ e| |
.. | |---+
.. | /|
.. | | Q2
.. | | PNP
.. OUT- <-------+ +-------> OUT+
.. | |
.. R2 R3
.. | |
.. | |
.. GND GND

James Arthur
 
T

Terry Pinnell

Jan 1, 1970
0
This morning I breadboarded both Fred Bloggs' final circuit
and Fred Bartoli's. Both work fine
thanks.

The latter is especially attractive because of its delightfully low
component count, as well as its novelty. My test input was a clean
square wave from a function generator, so of course the circuit might
need a front-end clean-up in practice. However, the outputs would
probably be fine without further squaring up, as their leading edges
were fast.

But how does it work please?! What function does that left hand PNP
serve, with its gate permanently at Vdd?

As it turns out, I haven't needed to build either of them after all.
Instead, I improvised from my existing LDR-based dawn/dusk circuit, as
shown here, and this appears to work well.
http://www.terrypin.dial.pipex.com/Images/CurtainTimerAddOn.gif

The dawn/dusk switch wasn't working reliably, mainly due to
unpredictable variations in light conditions, so I've abandoned it now
in favour of this 'Timer Add-on', which is set to open and close
curtains at fixed times.
 
F

Fred Bartoli

Jan 1, 1970
0
Terry Pinnell said:
This morning I breadboarded both Fred Bloggs' final circuit
and Fred Bartoli's. Both work fine
thanks.

The latter is especially attractive because of its delightfully low
component count, as well as its novelty. My test input was a clean
square wave from a function generator, so of course the circuit might
need a front-end clean-up in practice. However, the outputs would
probably be fine without further squaring up, as their leading edges
were fast.

But how does it work please?! What function does that left hand PNP
serve, with its gate permanently at Vdd?

Hi Terry,
don't forget its emitter :)

There are 3 basic circuits to build around a BJT : common emitter, common
base and common collector (emitter follower).
Google for those and you'll find all the needed information.

As you've seen, there are 2 transistors, the right one in common emitter
configuration, the left one in common base.

10K
___
.-|___|-+------+-----VDD
| | |
1K 1n | | |
12V ___ || | A | |<
-|___|--||--+-------|----| Q2
pulse || | | |\
| | |
Q1 |-----' |
/| |
| |
Set <-----+ +-----> Reset
| |
.-. .-.
| | | |
R1 | | | | R2
'-' '-'
| |
| |
=== ===
GND GND

Due to the base emitter junctions, the A point is clamped to +/- 0.6V around
VDD.
On rising edge, Q2 is reverse biased and the capacitor current is injected
into Q1 emitter => positive pulse on the set output.
On falling edge Q1 is reverse biased and the capacitor current turns Q2 on
=> positive pulse on the reset output.

The 1K resistor obviously limits injected current.
R1 needs to be > 1K*VDD/(12-VDD-0.6).

BTW, since those transistors drive a regenerative circuit (your NOR SR
latch) you don't need squaring after the transistors: the hysteresis is
built into the SR latch.
 
T

Terry Pinnell

Jan 1, 1970
0
"Fred Bartoli"
Hi Terry,
don't forget its emitter :)

There are 3 basic circuits to build around a BJT : common emitter, common
base and common collector (emitter follower).
Google for those and you'll find all the needed information.

As you've seen, there are 2 transistors, the right one in common emitter
configuration, the left one in common base.

10K
___
.-|___|-+------+-----VDD
| | |
1K 1n | | |
12V ___ || | A | |<
pulse || | | |\
| | |
Q1 |-----' |
/| |
| |
Set <-----+ +-----> Reset
| |
.-. .-.
| | | |
R1 | | | | R2
'-' '-'
| |
| |
=== ===
GND GND

Due to the base emitter junctions, the A point is clamped to +/- 0.6V around
VDD.
On rising edge, Q2 is reverse biased and the capacitor current is injected
into Q1 emitter => positive pulse on the set output.
On falling edge Q1 is reverse biased and the capacitor current turns Q2 on
=> positive pulse on the reset output.

The 1K resistor obviously limits injected current.
R1 needs to be > 1K*VDD/(12-VDD-0.6).

BTW, since those transistors drive a regenerative circuit (your NOR SR
latch) you don't need squaring after the transistors: the hysteresis is
built into the SR latch.

Thanks, Fred. Neat!
 
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