1Mhz -> 1hz

[Robert Latest]

By writing log10^6/ log12 *4 = 22 flip flops
I was thinking very straight ... Math stretches right where human
intuition sometimes fails.

We still would be grateful if you showed us the hat out of which
you pulled the 12.

But here you go:

As I said ask ... and I will explain.
By dividing by log 12 i was getting to the maximum number of mod 12
counters which would be 5.

Which indeed would be helpful if the OP had asked for the number
of divide-by-12 counters he needed to count to a million. But
alas, he hasn't.

robert

 

[John Fields]

I've seen some on sale on the web

By writing log10^6/ log12 *4 = 22 flip flops
I was thinking very straight ... Math stretches right where human
intuition sometimes fails . As I said ask ... and I will explain.
By dividing by log 12 i was getting to the maximum number of mod 12
counters which would be 5. With 5 of those you'd have a frequency of
1000000Hz /2.48832000E+005 =
4.01877572E+000Hz left .
I'd easily handle that with a Mod 4 counter leaving me with
4.01877572E+000Hz/4 = 1.00469393E+000 Hz which is quite good.
Total number of flip flops = 5*4 + 2 = 22 flip flops ... which is what
my simple division of logs up there was saying.

---
Regardless of the bullshit you're trying to palm off as knowlege,
you're still full of shit.
---

<grin> If I was you I wouldn't bet my life on that ... I got some
ideas on beating that limit!

---
Regardless of what ideas you may think you have, the smallest number
of "D" type flip-flops which one can use to divide by a million is
20.
---

I was acting in a subtle manner, read above ... it wasn't easy for
anyone to guess where the math was pointing to!

---
That's because it was pointless. All it did was point out, once
again, that you're a phony with no clue. Just another piece-of-shit
troll.
---

---
Bill, I've posted an HC solution to abse under this same subject
which uses 20 "D" type flip-flops in a ripple counter chain and a
modicum of combinatorial logic to generate a 50% duty cycle 1Hz
output for a 1MHz signal in. All prop delays are accounted for and
at 750ns worst case for a 4.5V supply at 25°C, that's well under the
1µs limit dictated by the 1MHz clock.

If this "Jackal" cretin can read schematics he might want to revise
his 22 flip-flop flop.
---

Regarding the delays I'd measure them before building the circuit. You
have at least 4 different types and they can amount to 10's of
nanoseconds which in terms of frequency is a lot . Mostly depend on
the technology of the logic families being used.
Then don't forget clock skews.

---
Measure them?

As if you knew how to...

All you have to do is read the data sheets and design accordingly,
you pretentious ass.

 

[theJackal]

We still would be grateful if you showed us the hat out of which
you pulled the 12.

But here you go:


Which indeed would be helpful if the OP had asked for the number
of divide-by-12 counters he needed to count to a million. But
alas, he hasn't.

robert

Start learning what counters are made of ... then maybe I will answer you

" Go easy on the whisky"

theJackal

 

[Winfield Hill]

siva wrote...

Hi,
to convert the 1 mhz input to 1 hz output, how many no. of D-flip flops
should i use?

To go from 1mHz to 1Hz, you need to multiply by 1000.

 

[theJackal]

But 22 flip-flops isn't quite enough, even if two of them aren't in
divide by 12 packages


I don't think you mathematical exercise took you anywhere useful


Hmm - ternary logic? I suspose there might be a way of exploiting the
fact that a tri-state output can be in three states ...


I'd love to know what you've got in mind.


Nothing complicated about where it was pointing - the puzzling aspect
was why one would want to point the OP that way.

LOL ... Oh gosh
Bill there you go again with your desperado tactics. First you say the best I can get to
is 24ffs with mod12 counters. I show you that you are wrong and you say ... so what .


Then you say why point the OP that way. Did you understand his question with flip
flops?... He wants a 1 Hz signal ... and do you understand that counters will get you
there? Do you know what counters are made of?


You claim that 21 flip flops will get you to 1MHz ... and 2^21 is 2,09715200E+006Hz.
Hell whats wrong with you?

Can you tell a desperate man by looking at his face ? I'm sure you can .

"Go easy with the whisky"

theJackal

 

[Thomas Magma]

You could use a cheap micro.

It's a single chip solution. Less that a buck. Smaller than a 8SOIC. You
choose your own duty cycle. It will still have functionality to spare. Low
current consumption.

Thomas

 

[Frank Bemelman]

siva wrote...

To go from 1mHz to 1Hz, you need to multiply by 1000.

How would you multiply 1mHz by 1000?

 

[[email protected]]

LOL ... Oh gosh
Bill there you go again with your desperado tactics. First you say the best I can get to
is 24ffs with mod12 counters. I show you that you are wrong and you say ... so what .

You didn't. If you restrict yourself to mod-12 counters, you need six
of them, which is 24 bistables.

If you loosen up and use five mod-12 counters and a dual D-type, you
still don't get 1MHz down to to 1Hz, though you do get pretty close,
without any preloading or decoding.

Quite why anyone would bother to do it that way escapes me.

Then you say why point the OP that way. Did you understand his question with flip
flops?... He wants a 1 Hz signal ... and do you understand that counters will get you
there? Do you know what counters are made of?

Don't be silly. I'm so old that I've made bistables with discrete
transistors. All the computation I did during my Ph.D. project was done
on computers that were built entirely with discrete transistors, and
the guy that taught how to program the PDP-8 though we needed to know
how to build our own bistables, not that I used his notes when I did
need to roll my own.

You claim that 21 flip flops will get you to 1MHz ... and 2^21 is 2,09715200E+006Hz.
Hell whats wrong with you?

Nothing. I do happen to know about decoding the outputs of counters so
that they reset before they reach their maximum count. I had thought
that everybody who posted here knew that sort of stuff.

If you don't understand decoding, you might be able to undertand how to
preset a counter. If you plow through enough of this thread, you will
find my suggestion that the OP might use 74HCT40103 8-bit counters
which are intended to be used in exactly this way -

http://www.semiconductors.philips.com/acrobat_download/datasheets/74HC40103_3.pdf

Have a look and learn something.

Can you tell a desperate man by looking at his face ? I'm sure you can .

Your confidence is amusing.

 

[Spehro Pefhany]

How would you multiply 1mHz by 1000?

PLL and divide by 1000. Go have a good night's sleep while it locks
in.


Best regards,
Spehro Pefhany

 

[Frank Bemelman]

PLL and divide by 1000. Go have a good night's sleep while it locks
in.

I wanted Win to say that I'd think I'd rectify the 1mHz, loooooow pass
filter, rectify again, another loooooow pass, and again, until you get
a whopping 8mHz and then do the 125 divide + PLL.

I'll think I'm going to have that good night's sleep now

 

[Winfield Hill]

Frank Bemelman wrote...

Spehro Pefhany wrote...

I wanted Win to say that I'd think I'd rectify the 1mHz,
loooooow pass filter, rectify again, another loooooow pass,
and again, until you get a whopping 8mHz and then do the
125 divide + PLL.

I'll think I'm going to have that good night's sleep now

A period of sleep would certainly appear to be involved.

 

[theJackal]

On 22 Dec 2005 15:53:08 -0800, [email protected] wrote:
sniped

If you don't understand decoding, you might be able to undertand how to
preset a counter. If you plow through enough of this thread, you will
find my suggestion that the OP might use 74HCT40103 8-bit counters
which are intended to be used in exactly this way -

OK then it makes more sense to use 21 flip flops to get to over 2hz then add all the
hardware to decode that and then bring it down to 1hz .

I think its rather obvious that the easier solution is
just use a 6 counters (22 ffs) to get to 1.00hz

Your confidence is amusing.

Aren't newsgroups for mutual amusement?



"Go easy on the whisky"

theJackal

 

[Ken Smith]

How would you multiply 1mHz by 1000?

PLL and divide by 1000. Go have a good night's sleep while it locks
in.[/QUOTE]

If you use a tri-state type of phase detector, the lock in time can be
only a few hours. If you run the VCO at lets say 1KHz, you can use a bit
of trickery to snap the the 1Hz nearly into phase at start-up.

 

[Ken Smith]

The real limit is still 20 bistables.

<grin> If I was you I wouldn't bet my life on that ... I got some
ideas on beating that limit![/QUOTE]

Bin-there-dun-that:

With easy to get parts, you are limited to a factor of about 5 per stage.
Since they aren't flip-flops any more it doesn't change the lower limit on
the number of flip-flops, if we assume that all frequency divides are done
by the flip-flops.

 

[[email protected]]

Maybe I'm missing something, but the most obvious way to me is 6
stages to divide by 64, then 14 more to divide by 15625 (binary
11110100001001) via a 6 input AND gate to sense the "1"s. Since only
"1"s are sensed, there can be no false resets due to propagation delay
or AND gate input skew etc. By the time the AND gate de-activates due
to the fastest ff reseting, all the other ffs should be comitted to
the reset, but a couple more gate delays would guarantee it. Or,
adding another ff (21 total) would clean it up completely (and also
mean that only a 5 input AND gate was needed, if that makes any
difference). Or, better yet, an 8 pin MCU as someone else suggested.