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14040 Counter help please

Discussion in 'General Electronics Discussion' started by Danno, Sep 22, 2015.

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  1. Danno


    Aug 31, 2015
    Bit of help needed understanding this 14040 counter. I will have a stab at how I think it works but will be a bit lost so any help appreciated, thanks.

    So I am thinking the E signal from the 6802 pulses the CK pin of the counter thus incrementing it. Q8 appears to go high after 128 CK pulses, Q8 goes off to a master gate transistor for a bank of triacs and also to the TX & RX CK of a 6850. Q4 seems to go high after 8 CK pulses looking at the data sheet, I am a bit stumped by the use of the IN4148 diodes D1 & D2 but am guessing they have something to do with resetting the counter.

    I am guessing Q8 sends pulses to the master gate for the triacs, the triacs form part of a coin payout via a payout slide, so would need pulsing 10 times to pay out 10 coins.

    Probably got that completely wrong so may need some help please.


    Attached Files:

  2. AnalogKid


    Jun 10, 2015
    I can't say what the outputs do outside the drawing fragment, but you've got the logic right. The two diodes and R67 form an and gate. Counting up from 0, Q4 pulses several times before Q8 goes high for the first time. Once Q8 is high, when Q4 next high both diodes are reverse biased and R67 pulls the reset pin high. There is a very narrow pulse on Q4 equal to the propagation delay from the reset pin input to the counter outputs changing state to 0.

  3. GPG


    Sep 18, 2015
    ^ so Q8 stays high till Q4 goes high giving a stable pulse out on Q8.
    Aside it reminds me of delving into the guts of a VIC20 many years ago to make it into an event timer.However the NMI was being used for keyboard scan and other housekeeping ( at 50Hz, mains derived) so I had to hijack the NMI vector to run the timing program and poked all the code which included resetting the NMI normal function
    Last edited: Sep 23, 2015
  4. Danno


    Aug 31, 2015

    Yes that makes sense, thank you
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