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11 to 30 volts --> 24 volts

Discussion in 'Electronic Design' started by Jim Weir, May 25, 2004.

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  1. Jim Weir

    Jim Weir Guest

    I'd like a device that will let me input anywhere between 11 and 30 volts and
    have a nice clean 24 volts (or 20 volts, or 22 volts...) at one amp as the
    output.

    I asked this question before and was given a pointer to a National Semi device.
    What I found with the National devices is that they are as squirrely as Kansas
    in springtime. One of the applications engineers actually told me that unless I
    followed the layout pattern PRECISELY that the device would be unstable. Hell,
    I've been doing groundplane construction up to 2.3 Gigs for thirty years and
    haven't had that sort of problem.

    Point being...anybody got a boost-buck device that they have had particular good
    luck with?

    Jim
     
  2. http://para.maxim-ic.com/ss.asp?Fam=DCDC_All&Tree=PowerSupplies&HP=PowerSupplies.cfm&ln=
     
  3. Jim Weir

    Jim Weir Guest

  4. Jim Weir

    Jim Weir Guest

    As I said, I use my breadboarding technique up beyond 2 Gigs and things work
    just fine. At these frequencies I treat fractions of picofarads and nanohenries
    as problems.

    The basic technique is to use a solid copper substrate and solder all the
    grounded parts directly to the substrate with zero length leads. The active and
    ungrounded components solder right at the body of the component so that there is
    usually less than 3 or 4 mm of stray inductance. What with #20 wire having an
    inductance of about a nanohenry per millimeter, I didn't think that was all that
    bad.

    The apps engineer almost implied that there was some "magic" going on with the
    layout as they did it, and that either a better or worse layout might honk up
    the works. I am not a happy camper with that sort of baloney.

    Jim



    "Terry Given" <>
    shared these priceless pearls of wisdom:


    ->
    ->Jim,
    ->If you treat your smps layout with the same care and attention - explicitly
    ->think about parasitics (especially L, but C can couple things places you
    ->dont want too), and keep them as low as practicable - then pretty much any
    ->smps chip will run fine.
     
  5. Jim,

    I downloaded SwitcherCAD from Linear Technology
    last week, <www.linear-tech.com>. It has a
    facility where you plug in your dc-dc specs and
    it offers a design suggestion (based of course
    on an LT chip, if one is available). I gave it
    your numbers above and it offered two circuits,
    based on the LT1270 and 1270A. The simulation
    allows probing the V and I of every component.
    Might be a useful starting point.
     
  6. Tim Shoppa

    Tim Shoppa Guest

    I don't think that the layout comment is targetted so much at you as it
    is towards a neophyte who puts the circuit together on a perfboard with
    ground via 30AWG wire-wrap connected willy-nilly.

    I've had very good luck with National Simple Switchers, indeed several
    of them are put together on perfboard (none of them SEPIC, admittedly).

    Tim.
     
  7. Genome

    Genome Guest

    |
    | I'd like a device that will let me input anywhere between 11 and 30
    volts and
    | have a nice clean 24 volts (or 20 volts, or 22 volts...) at one amp as
    the
    | output.
    |
    | I asked this question before and was given a pointer to a National
    Semi device.
    | What I found with the National devices is that they are as squirrely
    as Kansas
    | in springtime. One of the applications engineers actually told me
    that unless I
    | followed the layout pattern PRECISELY that the device would be
    unstable. Hell,
    | I've been doing groundplane construction up to 2.3 Gigs for thirty
    years and
    | haven't had that sort of problem.
    |
    | Point being...anybody got a boost-buck device that they have had
    particular good
    | luck with?
    |
    | Jim
    |

    I'd be inclined to say 'stuff it' and immediately go for a single switch
    'isolated' forward converter. I've just had a play with designing a
    sepic converter and I wouldn't put it up my bum.

    DNA
     
  8. DNA. I know you have LTSpice/SwitcherCAD and that
    does offer a sepic converter (based on the LT1270A)
    in response to Jim's spec. I'd be quite interested
    in your informed comments/criticisms about LT's
    offered circuit.
     
  9. Joerg

    Joerg Guest

    Hi Jim,

    Did you mean the LM3478? That's the one I am currently using in a design. So far
    it's ok but I'd appreciate if you could share some experience or feedback from the
    app engineers.

    Pretty much all boost converters can be configured SEPIC. That architecture only
    takes one more inductor and one more cap. Then it lets you go above and below the
    input voltage. A flyback is another option but that requires a custom inductor with
    two windings. The SEPIC can be done with two regular inductors.

    Regards, Joerg
     
  10. How about his circuit with LTC3440?
    www.eetasia.com/ARTICLES/2002APR/ 2002APR08_ICD_PL_PD_MPR_TAC.PDF
    Have not tried it, just curious what you think for this sort of application.
    JP
     
  11. Joerg

    Joerg Guest

    Hi Jan,

    The LTC3440 is nice and it has the transistors in there. But at the end of the day much
    boils down to cost. 100 qty lists above $3 which is kind of high. The LM3478 is about $1
    and the extra transistors and inductor are just pennies. I mostly stick to what is low
    cost.

    Regards, Joerg
     
  12. Terry Given

    Terry Given Guest

    Jim,
    If you treat your smps layout with the same care and attention - explicitly
    think about parasitics (especially L, but C can couple things places you
    dont want too), and keep them as low as practicable - then pretty much any
    smps chip will run fine. Layout is usually the culprit when things dont go,
    because most people dont understand it (easy: current flows in loops.
    minimise them:) hence the comment. There are lots of other reasons too,
    depending on the chip. spikes on the current sense line can cause short
    pulses (the comparator & flip-flop act as a sample-and-hold), the list goes
    on (wrong diodes, wrong caps, wrong FETs, etc)

    Occams razor suggests the chip does actually work - nat semi makes mistakes
    just like everybody else, but not many. Mind you, I once looked at IR 1200V
    half-bridge IGBT gate drive ICs. We bought a demo board from IR, and it
    promptly blew up. After replacing the drivers 3 times, we gave up and solved
    our problem a different way (they were costly anyway). A couple of years
    later, IR convinced me to look at them again. Same chip, properly laid out
    demo pcb, and they worked fine - we looked at the original PCB (I still had
    it) and the layout was appalling, stray inductance was maximised. no wonder
    they blew up (we didnt look into the failures at the time, because we
    thought IR could design their own pcbs properly, and we were busy). The rep
    said that particular applications ****-up cost them quite a few customers.
    Alas, we had developed some cute technology last time, and could make a
    gatedrive that performed as well, for half the price. so they lost our
    custom, permanently. the 200,000+ gatedrives per year we made (still make,
    but no me in the we) represented a fair few dollars lost for IR.

    Terry
     
  13. Joerg

    Joerg Guest

    Hi Jim,

    FYI: I just tested the converter part of a design, SEPIC with the LM3478. Works like
    a champ, no problems. And that was not even on a nice layout but on breadboard. It
    goes from zero to wherever I want it to go.

    Regards, Joerg
     
  14. Terry Given

    Terry Given Guest

    Right. Clearly you more than know what your doing with layout, so that aint
    your problem. And like hell theres magic in their layout - unless they have
    a sneaky min. inductance requirement, or something odd like that. Care to
    post any more data on the circuit that didnt go? we might learn something.

    Cheers
    Terry
     
  15. Genome

    Genome Guest

    | In article <2pJsc.551$_%>,
    |
    | > I'd be inclined to say 'stuff it' and immediately go for a single
    | > switch 'isolated' forward converter. I've just had a play with
    | > designing a sepic converter and I wouldn't put it up my bum.
    |
    | DNA. I know you have LTSpice/SwitcherCAD and that
    | does offer a sepic converter (based on the LT1270A)
    | in response to Jim's spec. I'd be quite interested
    | in your informed comments/criticisms about LT's
    | offered circuit.
    |
    | --
    | Tony Williams.

    That's a hard question, not sure I can do it justice.

    The software, naturally, adjusts the feedback resistor ratio to give the
    output voltage required. It also adjusts the inductance so there is more
    decicion making going on. I don't now what criterea it may use but a
    guess might be something like 20% ripple current in the inductors.

    One thing that doesn't seem to change is the compensation components
    which appear to be fixed at 1K and 1U which, sort of, implies a slow
    loop. I'd have to analyse it further to comment and that sort of thing
    bends my head until I come up with a method.

    I have downloaded AN-19 for a cursory poke around.

    The system is going to be second order up to the zero, 1K/1U, frequency
    and there is also a right half plane zero knocking about in there.
    Overall it doesn't look like the software optimises the loop. LT's
    method is a bit 'suck it and see' so I think you are still left with
    that task yourself.

    The standard circuit it comes up with is a bit...... 'Fixed' and it's
    useful to break it out of the given design mode and copy then paste the
    circuit into an ordinary diagram window. Then you get to have a proper
    play. I'll mention that the inductor coupling coefficient of 1 is
    unrealistic and may be undesireable if you want to achieve ripple
    current steering.

    The circuit has start up and stability problems and is improved by
    adding a 100nF capacitor across the feedback resistor. This renders the
    circuit first order overall and the start up and transient seem better.
    That's waving a bit of a wet finger in the air. Like I say I haven't
    tried to analyse things properly.

    Overall I'd say the circuit provided is a starting point but requires
    further optimisation to get the final result. I wouldn't expect software
    to be able to do that too well anyway. You are still forced to get your
    head into what the circuit is doing and make appropriate decisions
    yourself.

    As I've said LT's application notes aren't to heavy on analysis and
    compensation so... they could do with a bit more work in that area. That
    sort of stuff is difficult and it's no better and maybe slightly worse
    than what I've seen from other sources.

    It's not a panacea but 11/10 for having a good bit of software to try
    things out. I wouldn't be without it.

    DNA
     
  16. Thank you for the comments. I'm sure you can even casually
    look at such a circuit and more than do it justice.

    [snip interesting details. Thank you]

    That start-up wobble does hint at an underlying
    instability that would need further investigation
    before using the circuit. Confirmed by your comments.
    LTSpice is my new toy, and I'm still trying things out
    to get confidence in the results it produces. All the
    circuits tried so far have produced an impressively
    accurate analysis (finger trouble excepted).

    Thanks,
     
  17. In sepic, are the inductors magnetically coupled?
     
  18. Genome

    Genome Guest

    | >
    | > I'd be inclined to say 'stuff it' and immediately go for a single
    switch
    | > 'isolated' forward converter. I've just had a play with designing a
    | > sepic converter and I wouldn't put it up my bum.
    | >
    |
    | In sepic, are the inductors magnetically coupled?

    They don't have to be but they can be. The advantage is that you reduce
    things to one magnetic component. You can also design the thing to place
    leakage inductance at the input or output node, generally the input is
    chosen and this reduces the ripple current at the chosen node.

    When you do couple the inductors you cannot avoid having leakage
    inductance and this resonates with the coupling capacitor and can cause
    problems if it isn't damped in some way. The usual method is to add a
    series RC in parallel with the original to achieve parallel damping.

    The resonance itself can be an issue in particular if you try to
    regulate input current directly. It is avoided by controlling switch
    current which is, supposedly, ultimately equal to input current but the
    switch does not lie within the resonant loop so you avoid the associated
    phase changes.

    One of unitrodes engineers has done a couple of application notes that
    deal with the sepic converter. Worth reading but I can't remember the
    link at this time, somewhere in the design seminars on TI's website.

    Oh.... I got the sepic working having taken my own advice and stopped my
    feeble attempts to think in terms of bode plots and just wacked the
    linear model into LTspice..... handy bit of soft. I still can't claim to
    like it but it does do the job. I ended up with voltage mode control
    using a nominal FAN7556. I quite like that IC, pity it doesn't come with
    a reference.

    A current mode control loop would have broken my head but I suppose I
    should give it a bash?


    DNA
     
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