FETs: measuring Vgs(off)

Discussion in 'Electronic Design' started by Paul Burridge, Sep 21, 2004.

  1. Hi guys,

    I saw in Malvino's Electronic Principles that it is stated that Idss
    and gfs (the transconductance/gain) are easy to measure, whereas
    Vgs(off) is not and that manufacturers calculate it from this formula
    (hope I've remembered it right)

    Vgs(off) = -2*Idss/gfs

    I've just checked out this assertion by measuring Vgs - v - Id for a
    bunch of assorted FETs and found that I could easily establish the
    pinch off voltage to within about 0.1V either way. Contrary to what
    the book says, I personally have found it a simple matter to measure
    Vgs(off). So why do they make out it's a big deal?

    p.
    --

    "What is now proved was once only imagin'd." - William Blake, 1793.
    Paul Burridge, Sep 21, 2004
    #1
  2. Re: measuring Vgs(off)

    "Paul Burridge" <1.co.uk> schrieb im Newsbeitrag
    news:...
    > Hi guys,
    >
    > I saw in Malvino's Electronic Principles that it is stated that Idss
    > and gfs (the transconductance/gain) are easy to measure, whereas
    > Vgs(off) is not and that manufacturers calculate it from this formula
    > (hope I've remembered it right)
    >
    > Vgs(off) = -2*Idss/gfs
    >
    > I've just checked out this assertion by measuring Vgs - v - Id for a
    > bunch of assorted FETs and found that I could easily establish the
    > pinch off voltage to within about 0.1V either way. Contrary to what
    > the book says, I personally have found it a simple matter to measure
    > Vgs(off). So why do they make out it's a big deal?


    Hello Paul,
    Vgs_off seems to be often specified at Id=1nA. The measurement
    at such low current levels takes a lot of time and it requires a
    very clean test fixture.

    How have you measured at exactly Id = 1nA +/-0.1nA ?

    Best Regards,
    Helmut

    A typical datasheet:
    http://www.fairchildsemi.com/ds/J3/J310.pdf
    Helmut Sennewald, Sep 21, 2004
    #2
  3. Re: measuring Vgs(off)

    On Tue, 21 Sep 2004 20:56:00 +0200, "Helmut Sennewald"
    <> wrote:

    >Hello Paul,
    >Vgs_off seems to be often specified at Id=1nA. The measurement
    >at such low current levels takes a lot of time and it requires a
    >very clean test fixture.
    >
    >How have you measured at exactly Id = 1nA +/-0.1nA ?


    Hi Helmut,

    Is it 1nA? I thought it was 5. No matter.
    Yes, I'd expected someone to point out that the "negligible current"
    point was the likely problem area. I can't honestly say that I have,
    because my DVM drops out at 0.01mA! However, in the context of the
    wide spread of parameters one encounters with FETs., I'm pretty
    confident my 'drop-out' zone for current measurement is not too far
    off the mark. But you've answered my question and as ever I'm grateful
    to you for that.
    I actually found it more difficult measuring Id as Vgs approached
    zero. The negative tempco of these devices made that part more
    challenging. Fortunately I've got a 'peak-hold' button on my meter and
    by only connecting the drain circuit for a fraction of a second I was
    able to get what I believe to be a valid reading. Certainly good
    enough given the cushion one has to build into FET circuit design as a
    matter of course, anyway.

    >A typical datasheet:
    >http://www.fairchildsemi.com/ds/J3/J310.pdf


    Ah, I see they use a 300uS pulse, presumably to keep the device
    temperature down?

    Regards,

    p.
    Paul Burridge, Sep 21, 2004
    #3
  4. Paul Burridge

    John Walton Guest

    Re: measuring Vgs(off)

    International Rectifier has a white-paper on characterizing MOSFET's --
    kind of like comparing a Caterpillar D-9 to a bicycle -- but all of the
    standardized measurement methods are described in detail.

    If you have to measure nano, pico or femto -- Bob Pease had this interesting
    article on the NatSemi website about a half-dozen years ago:

    http://www.national.com/rap/Story/0,1562,5,00.html


    "Paul Burridge" <1.co.uk> wrote in message
    news:...
    > Hi guys,
    >
    > I saw in Malvino's Electronic Principles that it is stated that Idss
    > and gfs (the transconductance/gain) are easy to measure, whereas
    > Vgs(off) is not and that manufacturers calculate it from this formula
    > (hope I've remembered it right)
    >
    > Vgs(off) = -2*Idss/gfs
    >
    > I've just checked out this assertion by measuring Vgs - v - Id for a
    > bunch of assorted FETs and found that I could easily establish the
    > pinch off voltage to within about 0.1V either way. Contrary to what
    > the book says, I personally have found it a simple matter to measure
    > Vgs(off). So why do they make out it's a big deal?
    >
    > p.
    > --
    >
    > "What is now proved was once only imagin'd." - William Blake, 1793.
    John Walton, Sep 21, 2004
    #4
  5. Paul Burridge

    Ian Stirling Guest

    Re: measuring Vgs(off)

    In sci.electronics.design Paul Burridge <1.co.uk> wrote:
    > On Tue, 21 Sep 2004 20:56:00 +0200, "Helmut Sennewald"
    > <> wrote:
    >
    >>Hello Paul,
    >>Vgs_off seems to be often specified at Id=1nA. The measurement
    >>at such low current levels takes a lot of time and it requires a
    >>very clean test fixture.
    >>
    >>How have you measured at exactly Id = 1nA +/-0.1nA ?

    >
    > Hi Helmut,
    >
    > Is it 1nA? I thought it was 5. No matter.
    > Yes, I'd expected someone to point out that the "negligible current"
    > point was the likely problem area. I can't honestly say that I have,
    > because my DVM drops out at 0.01mA! However, in the context of the


    Turn it to voltage.
    Most meters (the four I've measured) have a 1Mohm or so input impedance
    on the 200mv range.
    This is 200nA full scale.
    Probably best to do the test twice, with the meter leads reversed though.
    Ian Stirling, Sep 22, 2004
    #5
  6. Re: measuring Vgs(off)

    Ian Stirling wrote...
    >
    > Paul Burridge wrote:
    >> Helmut Sennewald wrote:
    >>
    >>> Vgs_off seems to be often specified at Id=1nA. The measurement
    >>> at such low current levels takes a lot of time and it requires a
    >>> very clean test fixture.

    >>
    >> Is it 1nA? I thought it was 5. No matter.
    >> Yes, I'd expected someone to point out that the "negligible current"
    >> point was the likely problem area. I can't honestly say that I have,
    >> because my DVM drops out at 0.01mA! However, in the context of the

    >
    > Turn it to voltage. Most meters (the four I've measured) have a 1Mohm
    > or so input impedance on the 200mv range. This is 200nA full scale.
    > Probably best to do the test twice, with the meter leads reversed though.


    The multimeters on my bench have infinite input impedance on the 200mV
    scale, although some let you turn on an internal resistor. We can use
    external 10M or 100M if we like, which gives 1pA and 0.1pA measurement
    resolution with a 4.5-digit meter.

    The relevant "subthreshold" formula is Id = k e^(Vgs - Vt), which is
    an exponential equation that clearly shows there's no sudden threshold
    for FET current => negligible. Paul can take a look at AoE page 123,
    and observe the measured gate-voltage to drain current relationship for
    a typical MOSFET, which shows the standard smooth 100 or 150mV/decade
    (p or n-type) gate-voltage change over a wide 7-decade current range.

    1 or 5nA makes no difference? Nope, that apparently small detail makes
    a predictably large 70 to 100mV difference. One must pay attention to
    the specifications in this matter, 1nA, 1uA, whatever - it's a big deal.

    BTW, as I've pointed out several times, power MOSFET spice models are
    completely wrong in this region, just forget considering their results.


    --
    Thanks,
    - Win

    (email: use hill_at_rowland-dotties-org for now)
    Winfield Hill, Sep 22, 2004
    #6
  7. Re: measuring Vgs(off)

    Thanks, all, BTW.

    On 21 Sep 2004 19:50:22 -0700, Winfield Hill
    <> wrote:

    > The multimeters on my bench have infinite input impedance on the 200mV
    > scale, although some let you turn on an internal resistor. We can use
    > external 10M or 100M if we like, which gives 1pA and 0.1pA measurement
    > resolution with a 4.5-digit meter.


    I admit I never thought of doing it this way. Incidentally, talking of
    very low currents, on P.170 you've reproduced a picture of a static
    damaged MOSFET. I assume from the commentary that this one was totally
    trashed, but you've stated before that these devices can be partially
    blown and still function, albeit to an impaired extent. Could one
    feasibly measure any such 'minor damage' (through static) by checking
    for picoamp range current leakage across the insulating layer?

    > The relevant "subthreshold" formula is Id = k e^(Vgs - Vt), which is
    > an exponential equation that clearly shows there's no sudden threshold
    > for FET current => negligible. Paul can take a look at AoE page 123,
    > and observe the measured gate-voltage to drain current relationship for
    > a typical MOSFET, which shows the standard smooth 100 or 150mV/decade
    > (p or n-type) gate-voltage change over a wide 7-decade current range.
    >
    > 1 or 5nA makes no difference? Nope, that apparently small detail makes
    > a predictably large 70 to 100mV difference. One must pay attention to
    > the specifications in this matter, 1nA, 1uA, whatever - it's a big deal.


    Oh bugger.
    >
    > BTW, as I've pointed out several times, power MOSFET spice models are
    > completely wrong in this region, just forget considering their results.


    Yes, I think the same caveat applies for simulating FETs - and that's
    just in the active region!

    --

    "What is now proved was once only imagin'd." - William Blake, 1793.
    Paul Burridge, Sep 22, 2004
    #7
  8. Re: measuring Vgs(off)

    In article <>,
    Paul Burridge <1.co.uk> wrote:


    > Yes, I'd expected someone to point out that the "negligible
    > current" point was the likely problem area. I can't honestly say
    > that I have, because my DVM drops out at 0.01mA! However, in the
    > context of the wide spread of parameters one encounters with
    > FETs., I'm pretty confident my 'drop-out' zone for current
    > measurement is not too far off the mark. But you've answered my
    > question and as ever I'm grateful to you for that. I actually
    > found it more difficult measuring Id as Vgs approached zero.

    [snip]

    Paul, you might try the belt 'n braces method.

    --+--+15v
    |
    |--+
    +--->|
    | |--+
    | |
    | +------->To DVM
    | |
    | \
    | /R
    | \
    | |
    0v--+-------+------->

    Self-bias the jfet with resistor R, and measure the
    voltage across it. This gives you the Vgs and Id.

    Use two values of R, say 1k and 5k, and plug the
    results into the Id = Idss(etc) equation. Solve the
    two equations for Idss and Vgs(off).

    You've been wandering around this problem for days now.
    It might help if you could get hold of an old Siliconix
    Technical Article, TA70-2, first published in Electronics
    Design in May 1970, then included in the App Notes at the
    rear of most Siliconix FET data books for the next 15 or
    20 years thereafter.

    TA70-2 shows you how to plot Id/Vgs and gfs/Vgs curves
    and use them to determine the best bias point for minimum
    Id and gfs variations.

    --
    Tony Williams.
    Tony Williams, Sep 23, 2004
    #8
  9. Re: measuring Vgs(off)

    Tony Williams wrote...
    >
    > Paul Burridge <1.co.uk> wrote:
    >
    >> Yes, I'd expected someone to point out that the "negligible
    >> current" point was the likely problem area. I can't honestly say
    >> that I have, because my DVM drops out at 0.01mA! However, in the
    >> context of the wide spread of parameters one encounters with
    >> FETs., I'm pretty confident my 'drop-out' zone for current
    >> measurement is not too far off the mark. But you've answered my
    >> question and as ever I'm grateful to you for that. I actually
    >> found it more difficult measuring Id as Vgs approached zero.

    >[snip]
    >
    > Paul, you might try the belt 'n braces method.
    >
    > --+--+15v
    > |
    > |--+
    > +--->|
    > | |--+
    > | |
    > | +------->To DVM
    > | |
    > | \
    > | /R
    > | \
    > | |
    > 0v--+-------+------->
    >
    > Self-bias the jfet with resistor R, and measure the
    > voltage across it. This gives you the Vgs and Id.
    >
    > Use two values of R, say 1k and 5k, and plug the
    > results into the Id = Idss(etc) equation. Solve the
    > two equations for Idss and Vgs(off).
    >
    > You've been wandering around this problem for days now.
    > It might help if you could get hold of an old Siliconix
    > Technical Article, TA70-2, first published in Electronics
    > Design in May 1970, then included in the App Notes at the
    > rear of most Siliconix FET data books for the next 15 or
    > 20 years thereafter.
    >
    > TA70-2 shows you how to plot Id/Vgs and gfs/Vgs curves
    > and use them to determine the best bias point for minimum
    > Id and gfs variations.


    Tony, now found as Vishay's AN102 (Siliconix, 10-Mar-97)?
    See http://www.vishay.com/docs/70595/70595.pdf


    --
    Thanks,
    - Win

    (email: use hill_at_rowland-dotties-org for now)
    Winfield Hill, Sep 23, 2004
    #9
  10. Re: measuring Vgs(off)

    Tony Williams wrote...
    >
    > It might help if you could get hold of an old Siliconix
    > Technical Article, TA70-2, first published in Electronics
    > Design in May 1970, then included in the App Notes at the
    > rear of most Siliconix FET data books for the next 15 or
    > 20 years thereafter.


    Tony, if you have access to the May 1970 ED article, do you
    know who the author was? Also, was the Siliconix app note
    substantially the same?


    --
    Thanks,
    - Win

    (email: use hill_at_rowland-dotties-org for now)
    Winfield Hill, Sep 23, 2004
    #10
  11. Re: measuring Vgs(off)

    In article <>,
    Winfield Hill <> wrote:


    > Tony, if you have access to the May 1970 ED article, do you
    > know who the author was?


    James Sherwin.

    A J.S Sherwin is referenced as publishing many other
    technical articles or tech notes. In no particular
    order........

    "Liberate your FET amplifier". EDN May 1970.

    "Distortion in FET amplifiers". Electronics Dec 1966.

    "Voltage Controlled Resistors (FET)". Solid State Design Aug 1965.

    "How, Why and Where to use FETs". Electronic Design May 1966.

    "Knowing the Cause helps cure distortion in FET Amplifiers".
    Electronics Dec 1966.

    The two other Siliconix names from those days are J. Watson
    and W. Gosling. Bill Gosling was one of my professors in uni,
    although I didn't know then that I would 'meet' him again
    years later.


    > Also, was the Siliconix app note substantially the same?


    AN102 is obviously drawn from the original TA70-2 and seems
    to be a 1997 update+rewrite in electronic form. The guts of
    the information given in TA70-2 is still there, relatively
    unchanged.

    --
    Tony Williams.
    Tony Williams, Sep 23, 2004
    #11
  12. Re: measuring Vgs(off)

    On Thu, 23 Sep 2004 10:10:32 +0100, Tony Williams
    <> wrote:

    > Paul, you might try the belt 'n braces method.
    >
    > --+--+15v
    > |
    > |--+
    > +--->|
    > | |--+
    > | |
    > | +------->To DVM
    > | |
    > | \
    > | /R
    > | \
    > | |
    > 0v--+-------+------->
    >
    > Self-bias the jfet with resistor R, and measure the
    > voltage across it. This gives you the Vgs and Id.
    >
    > Use two values of R, say 1k and 5k, and plug the
    > results into the Id = Idss(etc) equation. Solve the
    > two equations for Idss and Vgs(off).
    >
    > You've been wandering around this problem for days now.
    > It might help if you could get hold of an old Siliconix
    > Technical Article, TA70-2, first published in Electronics
    > Design in May 1970, then included in the App Notes at the
    > rear of most Siliconix FET data books for the next 15 or
    > 20 years thereafter.
    >
    > TA70-2 shows you how to plot Id/Vgs and gfs/Vgs curves
    > and use them to determine the best bias point for minimum
    > Id and gfs variations.


    Thanks, Tony. Sorry for the delay in replying but I've been a bit tied
    up today what with one thing and another. I do have a useful app note
    from Siliconix, but mine deals with biasing for wide parameter
    variations in all sorts of configurations. It's very readable and
    interesting. I'll study your response in full as soon as time
    permiits.
    Thanks again,

    p.

    --

    "What is now proved was once only imagin'd." - William Blake, 1793.
    Paul Burridge, Sep 23, 2004
    #12
  13. Re: measuring Vgs(off)

    On Thu, 23 Sep 2004 12:54:12 +0100, Tony Williams
    <> wrote:


    > AN102 is obviously drawn from the original TA70-2 and seems
    > to be a 1997 update+rewrite in electronic form. The guts of
    > the information given in TA70-2 is still there, relatively
    > unchanged.


    AN102! Yes, that's the one I've kept as being most informative of all
    the web sources I came across. Essential reading for anyone designing
    circuits with FETs.

    --

    "What is now proved was once only imagin'd." - William Blake, 1793.
    Paul Burridge, Sep 23, 2004
    #13

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