DC-DC Converter Design

Discussion in 'Electronic Projects' started by Maelstorm, Feb 1, 2012.

  1. Maelstorm

    Maelstorm

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    I'm in the middle of the design phase for a high power DC-DC converter. The input source is 24vdc at about 115A which is supplied by heavy duty batteries. The output is at 180vdc at 10A peak. Peak power is 1800W. The minimum voltage input to the transformer is 16vdc (it will be wound as a 1:11.25 transformer). The problem that I am facing is the power conversion itself. I've reviewed several designs and in the transformer circuit, they have nothing, diodes, or capacitors. Now I understand why a diode would be needed (to dissipate the inductive kickback off the transformer primary), but I am not sure why a capacitor would be used unless it is to form a parallel LC tank circuit. If that is in fact the case, then wouldn't the inductance of the transformer vary based on load current, which would alter the resonant frequency of the circuit? And wouldn't that also have an effect on the skin effect in the transformer windings? I've attached a basic and incomplete schematic where I added both the diodes and the capacitors. Values are currently unspecified.

    Also, voltage sensing on the secondary. I would like to maintain galvanic isolation between the primary and secondary due to the high voltages involved. I've though about placing a VF converter on the high side and sending it through an optical isolator to a FV converter on the low side. I have also considered just winding a sense winding on the transformer as well...but I don't think that will be very representative of the actual output voltage under dynamic load conditions.

    What do you guys think?
     

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    Maelstorm, Feb 1, 2012
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  2. Maelstorm

    duke37 VIP Member

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    Normally, the transformer is connected in the drain leads of the fets. As you have it, the diode will short out the power when the opposite fet turns on.
    Also, to turn on the fet you will need a voltage way above the source, where will you get this from and how will you ensure that the fet is not damaged by excess volts?

    There will be some energy stored in the transformer but this will be dumped into the load in normal operation. Under light load, the fet which is OFF passes the current back to the power supply using its internal diode.

    The transformer does not run at resonance. The capacitors may be added to reduce the generation of high frequency noise. Skin effect should not be a problem unless running at high frequencies and then you will need special fet drivers and high frequency rectifiers.
     
    duke37, Feb 1, 2012
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  3. Maelstorm

    Rleo6965 VIP Member

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    If dc to dc inverter running at higher frequencies. You use multiple strand wire instead of single solid conductor for transformer winding to reduce skin effect.
     
    Rleo6965, Feb 1, 2012
    #3
  4. Maelstorm

    D_Hambley

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    Did you inherit this project and schematic from someone else?
    That schematic (odd variation of a push-pull) will not function as drawn.
    For example, when Q2 is on the transformer voltage is limited by the voltage drop of D2 reflected through the turns. Likewise for D1 when Q3 is on. As drawn, huge currents will flow through Q2-D2 or Q3-D1. Something isn't right.

    The basic topology must be understood first way before getting into advanced analysis details such as skin effect.
     
    D_Hambley, Feb 1, 2012
    #4
  5. Maelstorm

    Maelstorm

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    This is my own new design. The schematic was something that I put together at 12:30 AM to illustrate my questions, with diodes and caps. I modified it to the basic push-pull design so it should pass muster with the experts here. I have no clue as to what I was thinking when I drew it up. I think it was due to a combination of lack of sleep and the learning curve associated with the use of a new schematic capture program. I have a basic design written down on paper with some of the calculations.

    Anyways, the attached file should be better organized. And thanks for the tip on running multiple wires in parallel to avoid skin effect. I was thinking of just using a flat copper sheet wound around the core to mitigate that. I will be winding the transformers myself. Considering the power involved, I plan on using multiple channels for the actual power converter and placing 0.3 ohm 10 watt power resistors in the secondary to balance the load currents.
     

    Attached Files:

    Maelstorm, Feb 1, 2012
    #5
  6. Maelstorm

    D_Hambley

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    Now it's looking like a more realistic schematic. The dot for the second winding must be at pin 3, not pin 4. The use of a copper sheet for the primary is not uncommon at 115A IF you can parallel the secondary windings across each primary winding.
     
    D_Hambley, Feb 1, 2012
    #6
  7. Maelstorm

    daGenie

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    just wanna suggest you put zener diodes across the mosfets to absorb the inductive kickback of the transformer...........it should preserve the life of the mosfets
     
    daGenie, Feb 1, 2012
    #7
  8. Maelstorm

    D_Hambley

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    I just glanced at your first post again. 11.25:1 turns ratio will not be sufficient at 16Vin/180Vout. Other factors are involved in order to derive turns ratio. Among these are: maximum duty cycle, output diode drop, switching times and delays, MOSFET voltage drop, xfmr primary voltage drop, input filter voltage drop, output filter voltage drop, just to name a few.

    Design of a 1.8kW SMPS is not a trivial task. I just witnessed an engineer who was semi-experienced in power supply design trying to get a 2kW current source running but all the company got after 4 months was a breadboard with ringing, voltage spikes, and a poor loop response. If you are doing this for a hobby/learning project then it sounds like good fun. I've designed DC several converters in this power range. I'll check this forum occasionally to see how you're doing. If you are tasked with this at work however, a good power supply specialist could help get you started.
     
    D_Hambley, Feb 1, 2012
    #8
  9. Maelstorm

    Maelstorm

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    It's a hobby thing, for now.

    Hmm...zener diode snubbers... Instead of using a zener diode to protect the mosfets, why not just use a schottky blocking diode between the mosfet and the transformer winding? Place a capacitor in there to store the inductive kick and then cycle it back through the transformer when the other mosfet conducts. Not sure how well that will work given the possibility of core saturation since both primaries will be in phase at that point. My reasoning for this is that the power source is a battery, so I do not want to waste the energy if I can help it. I think at the very least it sure as heck would remove any DC biasing in the primary windings and negate the possibility of hysterisis causing a problem, and would lighten the transitional load on the opposite mosfet because the core is already changing magnetic polarity when it starts to conduct. How feasable would that be to impliment. I'll post a revised schematic when I'm at my computer and when I have had time to think about it.

    I have wound some E type transformers in the past, but nothing like a SMPS transformer. I like the idea of alternating the paralleled primary foil windings with the secondary windings. The more that the flux cuts across the windings, the better the efficiency.
     
    Maelstorm, Feb 1, 2012
    #9
  10. Maelstorm

    duke37 VIP Member

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    Putting a diode in series with the mosfets will drop the efficiency by at least 10% and I do not see any advantage, it will stop any stored energy being returned to the power source.
    Stored energy in the transformer can be returned to the power source through the inherent diode in the fet. A Schottky diode across the fet may help a little.
    The Zener is used across the fet to eliminate high voltage transient pulses. A well built transformer with low leakage inductance will minimise these pulses. Fets are reputed to be tolerant of such pulses unlike bjt transistors.
     
    duke37, Feb 1, 2012
    #10
  11. Maelstorm

    Maelstorm

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    I put together a more complete schematic. I'm thinking about making each converter channel a plugin module that operates in parallel. That way when more power is needed, just add a module. Tell me what you guys think.
     

    Attached Files:

    Maelstorm, Feb 4, 2012
    #11
  12. Maelstorm

    duke37 VIP Member

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    That looks better.
    The driver transitors/resistors could be replaced by a npn/pnp pair to provide pull up and pull down. I do not think that you need to pull the gates negative, that would eliminate the negative supply.
    The oscillator/divider circuit seems complicated, it could be replaced by a CMOS 4047 and delay could be included with a 4093.
     
    duke37, Feb 4, 2012
    #12
  13. Maelstorm

    Maelstorm

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    I scrapped that PWM design and went with a 555 based solution. From the LTSpice file attached, I'm using the RC network to generate the triangle/saw waveform pattern to feed into the voltage comparator. According to the spice simulation, the circuit does work as designed.... However when the voltage on the - input of U2 (sense voltage) drops below the lowest peak of the + input of U2 (this is connected to the 555 RC network), the output gets stuck high which causes one of the final outputs past the digital phase splitter to get stuck on which is not good.

    The only thing that I can think of is adding a second 555 circuit that has a fixed output of say...75% duty cycle that kicks in when the sense voltage drops below the 1/3 VCC mark. This would require another comparator and another set of AND gates to select which multivibrator to use. Is there another solution?


    As an aside, I do not understand why the forum does not allow the posting of .asc files...change the name from .txt to .asc to use in spice.
     

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    Maelstorm, Feb 17, 2012
    #13
  14. Maelstorm

    Maelstorm

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    This appears to be the final design of the PWM circuit. It uses a 555 timer, op-amps, and some logic circuits. It features dual phase output for push-pull configurations, over-voltage pulse skipping, and a fixed under-voltage duty cycle. I initially tried to use 2 555 timers, but the circuit would output glitches when the clocks switched due to differences in timing components. Let me know what you guys think.
     

    Attached Files:

    Maelstorm, Feb 19, 2012
    #14
  15. Maelstorm

    Maelstorm

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    Stuck

    Now I am stuck. LTSpice says that the current through the two primary windings of the transformer is swinging between +/- 300A? I've tried several things to see what effect they have and still can't seem to get this corrected. The mosfets are being driven on hard to +12v by the driver, but the load current should not be going to 300A instantly. That doesn't match what I know about real world performance of transformers and inductors in general. Switching freq is 50kHz. Also, the output voltage is in the 50v range. The turns ratio that I calculated should put it to the 180v range, but with a 1A load, its in the 50v range. I'm thinking it's a Spice problem and I should ignore it.
     

    Attached Files:

    Maelstorm, Feb 23, 2012
    #15
  16. Maelstorm

    duke37 VIP Member

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    Have you got the phasing of the input windings correct?
    Have you got the inductance correct?

    The current will go to a high level instantly if the load can take it but this does not look like the reason.

    Show a circuit diagram, looking at a list of numbers hurts my brain!
     
    duke37, Feb 23, 2012
    #16
  17. Maelstorm

    twister VIP Member

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    That schematic is too small for me to see. Is there any way I can make it bigger? When I change the zoom on my computer, it gets smaller!

    What are you going to use the 180 volts for?
     
    twister, Feb 23, 2012
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