continuous mode,current mode control, boost circuit

Discussion in 'Electronic Design' started by reggie, Feb 16, 2008.

  1. reggie

    reggie Guest

    Hi All,

    I am trying to understand the operation of a ML4824 Boost circuit
    operating in continuous mode using current mode control.

    I wanted to draw the critical voltage and current waveforms at each
    point through the circuit. Thus am trying to plot the ripple voltage
    across a boost capacitor with respect to the input full wave rectified
    100Hz voltage in steady state conditions.

    How could I work out the frequency, phase and magnitude of this ripple
    with respect to the input voltage to the circuit?

    Could someone please point me in the correct direction?
    Thanks,

    Reggie.

    Author reggie
    reggie, Feb 16, 2008
    #1
  2. reggie

    legg Guest

    On Sat, 16 Feb 2008 06:46:35 -0800 (PST), reggie
    <> wrote:

    >Hi All,
    >
    >I am trying to understand the operation of a ML4824 Boost circuit
    >operating in continuous mode using current mode control.
    >
    >I wanted to draw the critical voltage and current waveforms at each
    >point through the circuit. Thus am trying to plot the ripple voltage
    >across a boost capacitor with respect to the input full wave rectified
    >100Hz voltage in steady state conditions.
    >
    >How could I work out the frequency, phase and magnitude of this ripple
    >with respect to the input voltage to the circuit?
    >
    >Could someone please point me in the correct direction?
    >Thanks,
    >

    I think you're looking for Fairchild AN42045, which is a re-issue of
    Microlinear's AN-34. Formulas and scoped illustrations are provided on
    pages 4 and 6.

    RL
    legg, Feb 16, 2008
    #2
  3. reggie

    reggie Guest

    On 16 Feb, 22:30, legg <> wrote:
    > On Sat, 16 Feb 2008 06:46:35 -0800 (PST), reggie
    >
    >
    >
    >
    >
    > <> wrote:
    > >Hi All,

    >
    > >I am trying to understand the operation of a ML4824 Boost circuit
    > >operating in continuous mode using current mode control.

    >
    > >I wanted to draw the critical voltage and current waveforms at each
    > >point through the circuit. Thus am trying to plot the ripple voltage
    > >across a boost capacitor with respect to the input full wave rectified
    > >100Hz voltage in steady state conditions.

    >
    > >How could I work out the frequency, phase and magnitude of this ripple
    > >with respect to the input voltage to the circuit?

    >
    > >Could someone please point me in the correct direction?
    > >Thanks,

    >
    > I think you're looking for Fairchild AN42045, which is a re-issue of
    > Microlinear's AN-34. Formulas and scoped illustrations are provided on
    > pages 4 and 6.
    >
    > RL- Hide quoted text -
    >
    > - Show quoted text -


    Thanks Leg,

    Thanks for your information, I had seen somewhere the waveforms in
    this application note, but I couldn't remember where I had seen it. I
    am currently berried under a mass of printed application noted and my
    favorites folder is about to explode!

    What I was after is an idiots guide to the operation of the gain
    modulator.

    I think if I understand this in context of the whole controller I
    should be able to work out the magnitude and phase of the ripple
    voltage on the boost cap.

    I in effect want to understand how the ripple is produced, not just to
    assume it's the shape of the waveform in the application note.

    I don't understand:

    a) the phase relationship between the mains sine wave and the boost
    ripple voltage
    b) the amplitude of the ripple due to the boost circuit (however know
    the ESR of the capacitor has an in pact on this)
    c) how to derive/understand the equation Igain=(Iac*veao)/Vrms^2

    I hope I have explained myself clearly enough and outlined what I am
    trying to do,

    Hope someone can point me in the correct direction,

    Regards,

    Reggie
    reggie, Feb 19, 2008
    #3
  4. reggie

    reggie Guest

    On 19 Feb, 17:03, reggie <> wrote:
    > On 16 Feb, 22:30, legg <> wrote:
    >
    >
    >
    >
    >
    > > On Sat, 16 Feb 2008 06:46:35 -0800 (PST), reggie

    >
    > > <> wrote:
    > > >Hi All,

    >
    > > >I am trying to understand the operation of a ML4824 Boost circuit
    > > >operating in continuous mode using current mode control.

    >
    > > >I wanted to draw the critical voltage and current waveforms at each
    > > >point through the circuit. Thus am trying to plot the ripple voltage
    > > >across a boost capacitor with respect to the input full wave rectified
    > > >100Hz voltage in steady state conditions.

    >
    > > >How could I work out the frequency, phase and magnitude of this ripple
    > > >with respect to the input voltage to the circuit?

    >
    > > >Could someone please point me in the correct direction?
    > > >Thanks,

    >
    > > I think you're looking for Fairchild AN42045, which is a re-issue of
    > > Microlinear's AN-34. Formulas and scoped illustrations are provided on
    > > pages 4 and 6.

    >
    > > RL- Hide quoted text -

    >
    > > - Show quoted text -

    >
    > Thanks Leg,
    >
    > Thanks for your information, I had seen somewhere the waveforms in
    > this application note, but I couldn't remember where I had seen it. I
    > am currently berried under a mass of printed application noted and my
    > favorites folder is about to explode!
    >
    > What I was after is an idiots guide to the operation of the gain
    > modulator.
    >
    > I think if I understand this in context of the whole controller I
    > should be able to work out the magnitude and phase of the ripple
    > voltage on the boost cap.
    >
    > I in effect want to understand how the ripple is produced, not just to
    > assume it's the shape of the waveform in the application note.
    >
    > I don't understand:
    >
    > a)      the phase relationship between the mains sine wave and the boost
    > ripple voltage
    > b)      the amplitude of the ripple due to the boost circuit (however know
    > the ESR of the capacitor has an in pact on this)
    > c)      how to derive/understand the equation Igain=(Iac*veao)/Vrms^2
    >
    > I hope I have explained myself clearly enough and outlined what I am
    > trying to do,
    >
    > Hope someone can point me in the correct direction,
    >
    > Regards,
    >
    > Reggie- Hide quoted text -
    >
    > - Show quoted text -


    anyone,

    any ideas?

    I am stuck!

    reggie,
    reggie, Feb 21, 2008
    #4
  5. reggie

    legg Guest

    On Tue, 19 Feb 2008 09:03:47 -0800 (PST), reggie
    <> wrote:


    >I in effect want to understand how the ripple is produced, not just to
    >assume it's the shape of the waveform in the application note.
    >
    >I don't understand:
    >
    >a) the phase relationship between the mains sine wave and the boost
    >ripple voltage


    The pfc is designed to draw sinusoidal currents from the line. The LF
    ripple voltage on the LF bulk caps can be assumed to be 120Hz lagging.

    >b) the amplitude of the ripple due to the boost circuit (however know
    >the ESR of the capacitor has an in pact on this)


    HF ripple current is created by both the boost source and any HF
    switched load. The resulting voltage depends on extent of HF
    decoupling and degree of synchronization attempted.

    >c) how to derive/understand the equation Igain=(Iac*veao)/Vrms^2


    I'd have to know where the formula is pulled from before attempting to
    figure out what the author intended to convey. Igain, by itself, has
    no inherent meaning or sense.


    RL
    legg, Feb 21, 2008
    #5
  6. reggie

    reggie Guest

    On 21 Feb, 21:59, legg <> wrote:
    > On Tue, 19 Feb 2008 09:03:47 -0800 (PST), reggie
    >
    > <> wrote:
    > >I in effect want to understand how the ripple is produced, not just to
    > >assume it's the shape of the waveform in the application note.

    >
    > >I don't understand:

    >
    > >a) the phase relationship between the mains sine wave and the boost
    > >ripple voltage

    >
    > The pfc is designed to draw sinusoidal currents from the line. The LF
    > ripple voltage on the LF bulk caps can be assumed to be 120Hz lagging.
    >
    > >b) the amplitude of the ripple due to the boost circuit (however know
    > >the ESR of the capacitor has an in pact on this)

    >
    > HF ripple current is created by both the boost source and any HF
    > switched load. The resulting voltage depends on extent of HF
    > decoupling and degree of synchronization attempted.
    >
    > >c) how to derive/understand the equation Igain=(Iac*veao)/Vrms^2

    >
    > I'd have to know where the formula is pulled from before attempting to
    > figure out what the author intended to convey. Igain, by itself, has
    > no inherent meaning or sense.
    >
    > RL





    > The LF ripple voltage on the LF bulk caps can be
    > assumed to be 120Hz lagging.


    It's 100Hz over hear in the UK. I understand that it is the same
    frequency as the rectified mains, but I don't understand how this
    frequency ends up on the boost cap.
    How does it get from the rectified mains to being ripple superimposed
    on the DC boost capacitor?

    I think it is something to do with the modulation stage of the chip
    (in my case an ML4824 combo PFC and Forward controller). It takes the
    boost voltage and in effect injects a current into the gain modulator
    (pin2 = Iac). I think this is to sample the input current as so it can
    make the input current in phase with the input voltage.

    This may be a silly question, is the phase lag on the ripple current
    caused by a propagation delay thought the chip?

    > HF ripple current is created by both the boost source and any HF
    > switched load. The resulting voltage depends on extent of HF
    > decoupling and degree of synchronization attempted.


    Understand.

    Hear is a link to the datasheet of the controller:

    http://www.fairchildsemi.com/pf/ML/ML4824-1.html
    or
    http://www.fairchildsemi.com/ds/ML/ML4824-1.pdf

    Equation on page 8
    Igain=(Iac*veao)/Vrms^2
    How would you derive this equation?

    I understand that the squared element is a linearization trick, but
    cannot seem to grasp the rest.

    Hope I am making sense.

    Reggie
    reggie, Feb 22, 2008
    #6
  7. reggie

    legg Guest

    On Fri, 22 Feb 2008 13:04:13 -0800 (PST), reggie
    <> wrote:


    >> The LF ripple voltage on the LF bulk caps can be
    >> assumed to be 120Hz lagging.

    >
    >It's 100Hz over hear in the UK. I understand that it is the same
    >frequency as the rectified mains, but I don't understand how this
    >frequency ends up on the boost cap.
    >How does it get from the rectified mains to being ripple superimposed
    >on the DC boost capacitor?
    >
    >I think it is something to do with the modulation stage of the chip
    >(in my case an ML4824 combo PFC and Forward controller). It takes the
    >boost voltage and in effect injects a current into the gain modulator
    >(pin2 = Iac). I think this is to sample the input current as so it can
    >make the input current in phase with the input voltage.
    >
    >This may be a silly question, is the phase lag on the ripple current
    >caused by a propagation delay thought the chip?


    No. .A capacitor's voltage changes under the relationship

    dv = Ic / C

    dv = rate of voltage change (volts / second)
    Ic = dq/dt = capacitor current (amps)
    C = capacitance (farads)

    A simple sinusoidal current will produce it's integral - a cosine -
    a similar waveshape delayed 90 degrees.

    Complex current waveforms produce complex voltages with identical spot
    harmonic content and varying harmonic amplitude (1/f) that are delayed
    individually by their own frequency-related 90 degrees shifts.

    Becouse the bulk of the current is at double the line frequency, this
    double frequency shows up on the LF filter caps.

    These are pretty basic concepts covered in most basic electronics
    texts.

    >
    >> HF ripple current is created by both the boost source and any HF
    >> switched load. The resulting voltage depends on extent of HF
    >> decoupling and degree of synchronization attempted.

    >
    >Understand.
    >
    >Hear is a link to the datasheet of the controller:
    >
    >http://www.fairchildsemi.com/pf/ML/ML4824-1.html
    >or
    >http://www.fairchildsemi.com/ds/ML/ML4824-1.pdf
    >
    >Equation on page 8
    >Igain=(Iac*veao)/Vrms^2
    >How would you derive this equation?
    >
    >I understand that the squared element is a linearization trick, but
    >cannot seem to grasp the rest.


    The text actually reads

    Igainmod = [ ( Iac*veao ) / Vrms^2 ] x 1V

    - Igainmod refers to the output current forced by the modulator into
    pin #3 of the IC.

    - Iac refers to the current forced into IC pin#2.

    - Veao refers to the voltage produced on pin16 by the internal voltage
    error amplifier, in response to the HVDC divider connected to input
    pin15 as is differs from the internal reference of 2V5.

    - Vrms refers to the voltage input at pin 4 - a voltage related to the
    rectified sinusoidal input for which a related linear current is
    required for unity power factor. It should probably be labeled 'Vform'
    or Vin, or something else less potentially confusing.

    - 1V is a scaling factor to produce a chip output current in amps.

    This is a formula that only applies to this IC in the manner
    illustrated in this diagram. Why the term 1/Vrms^2, or 1/Vform^2?
    I have to assume it's a 'linearizing' factor introduced to produce a
    wider dynamic range in the circuit.

    What is not evident or included in this formula is the effect of the
    resistor in series with pin3 - the Isense pin carrying Igainmod..

    Voltage developed by the sensed current is expected to be negative,
    sucking current that the multiplier produces from pin3 - for a zero
    voltage internal null.

    I assume that the external/internal resistor values are specified in
    the standard spec or operating diagrams. Notes on page 8 indicate only
    that if the pin itself is pulled a volt below ground, the output
    modulation is inhibited (by circuitry not illustrated here), rather
    than allowing increased multiplier current to compensate the 'large'
    current sensing voltage - the normal function.

    RL
    legg, Feb 22, 2008
    #7
  8. reggie

    legg Guest

    On Fri, 22 Feb 2008 18:58:20 -0500, legg <> wrote:


    Should be dv/dt rather than dv below

    >No. .A capacitor's voltage changes under the relationship
    >
    > dv = Ic / C
    >
    >dv = rate of voltage change (volts / second)
    >Ic = dq/dt = capacitor current (amps)
    >C = capacitance (farads)
    >
    >A simple sinusoidal current will produce it's integral - a cosine -
    >a similar waveshape delayed 90 degrees.
    >
    >Complex current waveforms produce complex voltages with identical spot
    >harmonic content and varying harmonic amplitude (1/f) that are delayed
    >individually by their own frequency-related 90 degrees shifts.
    >
    >Becouse the bulk of the current is at double the line frequency, this
    >double frequency shows up on the LF filter caps.
    >
    >These are pretty basic concepts covered in most basic electronics
    >texts.
    >
    >>
    >>> HF ripple current is created by both the boost source and any HF
    >>> switched load. The resulting voltage depends on extent of HF
    >>> decoupling and degree of synchronization attempted.

    >>
    >>Understand.
    >>
    >>Hear is a link to the datasheet of the controller:
    >>
    >>http://www.fairchildsemi.com/pf/ML/ML4824-1.html
    >>or
    >>http://www.fairchildsemi.com/ds/ML/ML4824-1.pdf
    >>
    >>Equation on page 8
    >>Igain=(Iac*veao)/Vrms^2
    >>How would you derive this equation?
    >>
    >>I understand that the squared element is a linearization trick, but
    >>cannot seem to grasp the rest.

    >
    >The text actually reads
    >
    >Igainmod = [ ( Iac*veao ) / Vrms^2 ] x 1V
    >

    <snip>

    >This is a formula that only applies to this IC in the manner
    >illustrated in this diagram. Why the term 1/Vrms^2, or 1/Vform^2?
    >I have to assume it's a 'linearizing' factor introduced to produce a
    >wider dynamic range in the circuit.


    Obviously Vrms shows up in the denominator, as the current requirement
    (and hopefully the current limit should reduce as the line voltage
    increases, for a constant output power.

    I could see this might be raised to an exponent of some kind only if
    the current being sensed was a peak value with low continuity. That's
    not the case here.

    RL
    legg, Feb 23, 2008
    #8
  9. reggie

    reggie Guest

    On 23 Feb, 03:23, legg <> wrote:
    > On Fri, 22 Feb 2008 18:58:20 -0500, legg <> wrote:
    >
    > Should be dv/dt rather than dv below
    >
    >
    >
    >
    >
    > >No. .A capacitor's voltage changes under the relationship

    >
    > > dv = Ic / C

    >
    > >dv = rate of voltage change (volts / second)
    > >Ic = dq/dt = capacitor current (amps)
    > >C = capacitance (farads)

    >
    > >A simple sinusoidal current will produce it's integral - a cosine -
    > >a similar waveshape delayed 90 degrees.

    >
    > >Complex current waveforms produce complex voltages with identical spot
    > >harmonic content and varying harmonic amplitude (1/f) that are delayed
    > >individually by their own frequency-related 90 degrees shifts.

    >
    > >Becouse the bulk of the current is at double the line frequency, this
    > >double frequency shows up on the LF filter caps.

    >
    > >These are pretty basic concepts covered in most basic electronics
    > >texts.

    >
    > >>> HF ripple current is created by both the boost source and any HF
    > >>> switched load. The resulting voltage depends on extent of HF
    > >>> decoupling and degree of synchronization attempted.

    >
    > >>Understand.

    >
    > >>Hear is a link to the datasheet of the controller:

    >
    > >>http://www.fairchildsemi.com/pf/ML/ML4824-1.html
    > >>or
    > >>http://www.fairchildsemi.com/ds/ML/ML4824-1.pdf

    >
    > >>Equation on page 8
    > >>Igain=(Iac*veao)/Vrms^2
    > >>How would you derive this equation?

    >
    > >>I understand that the squared element is a linearization trick, but
    > >>cannot seem to grasp the rest.

    >
    > >The text actually reads

    >
    > >Igainmod = [ ( Iac*veao ) / Vrms^2 ] x 1V

    >
    > <snip>
    >
    > >This is a formula that only applies to this IC in the manner
    > >illustrated in this diagram. Why the term 1/Vrms^2, or 1/Vform^2?
    > >I have to assume it's a 'linearizing' factor introduced to produce a
    > >wider dynamic range in the circuit.

    >
    > Obviously Vrms shows up in the denominator, as the current requirement
    > (and hopefully the current limit should reduce as the line voltage
    > increases, for a constant output power.
    >
    > I could see this might be raised to an exponent of some kind only if
    > the current being sensed was a peak value with low continuity. That's
    > not the case here.
    >
    > RL- Hide quoted text -
    >
    > - Show quoted text -


    Sorry I'm being a bit slow, and probably not seeing the wood for the
    trees.

    I understand that there will be phase shifts approaching 90 deg (ESR
    makes it not quite 90 deg) because it's a capacitor and basic AC
    theory, but the chip is simulating this effect to the line, not the
    components themselves, otherwise you wouldn't need the chip. The ac
    circuit theory can be used between input and output because the chip
    does such a good job of that simulation. What I am trying to find out
    is how to plot the mains sinewave input voltage against ripple voltage
    using the chips algorithm.

    Why does a full wave rectified waveform, turns into what looks like a
    good sinewave? This waveform is what is confusing me. I think it is
    too pure to be power parasitic elements and have a hunch that it's
    something to do with the control chip. I may be wrong it won't be the
    first time!

    I think this formula is the key.

    Igainmod = [ ( Iac*veao ) / Vrms^2 ] x 1V

    How in words does this help to achieve unity power factor?

    >Obviously Vrms shows up in the denominator, as the current requirement
    >(and hopefully the current limit should reduce as the line voltage
    >increases, for a constant output power.


    Doesn't the current sense pin do this function by scaling the output
    of the modulator signal? This chip has a cycle by cycle current limit
    and thus power limit and in any case this Vrms provides a long term
    voltage signal as it's slow, because it's heavily filtered.

    From what I understand (limited I know) Pin 2 Iac is the instantaneous
    input current and is bouncing up and down in a full wave rectified
    kind of way. This signal provides an accurate scaled current, so the
    chip has a reference to which it can use to draw current in phase
    with.

    Iac is then modulated with the voltage loops error signal (probably to
    inject output voltage level information and provide some line phase
    information to the signal at that point), in effect providing a
    reference for the current error loop.

    Isn't the 1/Vrms^2 term to provide feed forward to keep the slow
    voltage control loop from having to react to changes in line voltage?

    I'm not too clear yet and need to find an explanation in words for how
    this form of active PFC works. I don't think the description in the
    document from the manufacturer fully explains the equation above.

    I need waveforms!!

    Any ideas?

    Confused Reggie...
    reggie, Feb 23, 2008
    #9
  10. reggie

    legg Guest

    On Sat, 23 Feb 2008 09:21:03 -0800 (PST), reggie
    <> wrote:


    >Why does a full wave rectified waveform, turns into what looks like a
    >good sinewave? This waveform is what is confusing me. I think it is
    >too pure to be power parasitic elements and have a hunch that it's
    >something to do with the control chip. I may be wrong it won't be the
    >first time!
    >

    I recall being somewhat perplexed at seeing what apparently was a
    fairly cleen sinusoid myself, a decade or so ago. However the waveform
    or my perplexity prevented the timely production of useful and
    reliable hardware.

    The old unitrode U-134 by Philip Todd has some theoretical waveforms
    for you, with competent labeling for LF voltage, current and power.:

    http://focus.ti.com/lit/an/slua144/slua144.pdf

    As far as PFC methods and formulas go, these are many and varied,
    making interesting reading, when you've got the time and inclination
    to do so.

    The eferenced app note applies to the 3854, a much more widely used
    device with similar control inputs and design method.

    The only MicroLinear PFC chip I ever directly encountered was the
    ML4812, which, in it's initial release, had the annoying habit of
    going inependantly active high on its mosfet driver output, at the
    time of shutdown UVLO, for a period dependent upon the discharge time
    of any capacitors that might be hanging on it's reference pin for
    simple decoupling purposes. I believe they fixed that, eventually, but
    it came as a surpise at the time, particularly in buck PFC
    applications.

    I think I've used a MicroLinear 8pin PFC/PWM combo controller since,
    without too much trouble, except there still seemed to be issues with
    supply consumption in and around the UVLO thresholds.

    >
    >I need waveforms!!
    >
    >Any ideas?


    Make some.

    RL
    legg, Feb 23, 2008
    #10
  11. reggie

    reggie Guest

    On 23 Feb, 22:13, legg <> wrote:
    > On Sat, 23 Feb 2008 09:21:03 -0800 (PST), reggie
    >
    > <> wrote:
    > >Why does a full wave rectified waveform, turns into what looks like a
    > >good sinewave? This waveform is what is confusing me. I think it is
    > >too pure to be power parasitic elements and have a hunch that it's
    > >something to do with the control chip. I may be wrong it won't be the
    > >first time!

    >
    > I recall being somewhat perplexed at seeing what apparently was a
    > fairly cleen sinusoid myself, a decade or so ago. However the waveform
    > or my perplexity prevented the timely production of useful and
    > reliable hardware.
    >
    > The old unitrode U-134 by Philip Todd has some theoretical waveforms
    > for you, with competent labeling for LF voltage, current and power.:
    >
    > http://focus.ti.com/lit/an/slua144/slua144.pdf
    >
    > As far as PFC methods and formulas go, these are many and varied,
    > making interesting reading, when you've got the time and inclination
    > to do so.
    >
    > The eferenced app note applies to the 3854, a much more widely used
    > device with similar control inputs and design method.
    >
    > The only MicroLinear PFC chip I ever directly encountered was the
    > ML4812, which, in it's initial release, had the annoying habit of
    > going inependantly active high on its mosfet driver output, at the
    > time of shutdown UVLO, for a period dependent upon the discharge time
    > of any capacitors that might be hanging on it's reference pin for
    > simple decoupling purposes. I believe they fixed that, eventually, but
    > it came as a surpise at the time, particularly in buck PFC
    > applications.
    >
    > I think I've used a MicroLinear 8pin PFC/PWM combo controller since,
    > without too much trouble, except there still seemed to be issues with
    > supply consumption in and around the UVLO thresholds.
    >
    >
    >
    > >I need waveforms!!

    >
    > >Any ideas?

    >
    > Make some.
    >
    > RL


    Hi again,

    >I recall being somewhat perplexed at seeing what apparently was a
    >fairly cleen sinusoid myself, a decade or so ago. However the waveform
    >or my perplexity prevented the timely production of useful and
    >reliable hardware.


    You have a very valid point there. I'm getting to the stage of just
    excepting that's the way it is. I think the sine wave comes from the
    filter attached to pin 4 Vrms. But what I don't understand is what the
    waveform looks like on the output of the gain modulator. I need to
    move on..!

    >http://focus.ti.com/lit/an/slua144/slua144.pdf


    Thank's looks good!

    As far as waveforms go, simulation or scope? Although can't scope
    inside the chip, but I must move on!!!!

    Thanks for your help Leg, I really appreciate it,

    Reggie.
    reggie, Feb 24, 2008
    #11
  12. reggie

    legg Guest

    On Sun, 24 Feb 2008 00:11:03 -0800 (PST), reggie
    <> wrote:


    >As far as waveforms go, simulation or scope? Although can't scope
    >inside the chip, but I must move on!!!!
    >

    Simulation of single specific waveforms is not so hard.

    Version 4
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    WIRE 432 224 432 80
    WIRE 272 272 272 208
    WIRE -144 304 -144 288
    WIRE 128 304 128 176
    WIRE 128 304 -144 304
    WIRE 32 320 32 192
    WIRE 128 320 128 304
    WIRE 32 416 32 384
    WIRE 128 416 128 384
    WIRE 128 416 32 416
    WIRE 160 416 128 416
    WIRE 272 416 272 352
    WIRE 272 416 240 416
    WIRE 352 416 272 416
    WIRE 432 416 432 304
    WIRE 432 416 352 416
    WIRE 352 432 352 416
    FLAG 352 432 0
    SYMBOL current -144 208 R0
    WINDOW 3 -81 115 Left 0
    WINDOW 123 0 0 Left 0
    WINDOW 39 0 0 Left 0
    SYMATTR InstName I1
    SYMATTR Value SINE(0 1.414 50 0 0 0 200)
    SYMBOL diode 48 176 R180
    WINDOW 0 -23 0 Left 0
    WINDOW 3 22 81 Left 0
    SYMATTR InstName D1
    SYMATTR Value MUR460
    SYMBOL diode 144 176 R180
    WINDOW 0 21 1 Left 0
    WINDOW 3 24 60 Left 0
    SYMATTR InstName D2
    SYMATTR Value MUR460
    SYMBOL diode 48 384 R180
    WINDOW 0 -19 62 Left 0
    WINDOW 3 24 6 Left 0
    SYMATTR InstName D3
    SYMATTR Value MUR460
    SYMBOL diode 144 384 R180
    WINDOW 0 23 61 Left 0
    WINDOW 3 24 -13 Left 0
    SYMATTR InstName D4
    SYMATTR Value MUR460
    SYMBOL cap 256 144 R0
    SYMATTR InstName C1
    SYMATTR Value 2.2E-4
    SYMBOL res 256 256 R0
    SYMATTR InstName R1
    SYMATTR Value .1
    SYMBOL res 416 208 R0
    SYMATTR InstName R2
    SYMATTR Value 400
    SYMBOL res 256 400 R90
    WINDOW 0 0 56 VBottom 0
    WINDOW 3 32 56 VTop 0
    SYMATTR InstName R3
    SYMATTR Value .1
    TEXT -226 506 Left 0 !.tran 0 1 .95
    legg, Feb 24, 2008
    #12
  13. reggie

    reggie Guest

    On 24 Feb, 15:09, legg <> wrote:
    > On Sun, 24 Feb 2008 00:11:03 -0800 (PST), reggie
    >
    > <> wrote:
    > >As far as waveforms go, simulation or scope? Although can't scope
    > >inside the chip, but I must move on!!!!

    >
    > Simulation of single specific waveforms is not so hard.
    >
    > Version 4
    > SHEET 1 880 680
    > WIRE 128 80 32 80
    > WIRE 272 80 128 80
    > WIRE 432 80 272 80
    > WIRE 32 112 32 80
    > WIRE 128 112 128 80
    > WIRE 272 144 272 80
    > WIRE 32 192 32 176
    > WIRE 32 192 -144 192
    > WIRE -144 208 -144 192
    > WIRE 432 224 432 80
    > WIRE 272 272 272 208
    > WIRE -144 304 -144 288
    > WIRE 128 304 128 176
    > WIRE 128 304 -144 304
    > WIRE 32 320 32 192
    > WIRE 128 320 128 304
    > WIRE 32 416 32 384
    > WIRE 128 416 128 384
    > WIRE 128 416 32 416
    > WIRE 160 416 128 416
    > WIRE 272 416 272 352
    > WIRE 272 416 240 416
    > WIRE 352 416 272 416
    > WIRE 432 416 432 304
    > WIRE 432 416 352 416
    > WIRE 352 432 352 416
    > FLAG 352 432 0
    > SYMBOL current -144 208 R0
    > WINDOW 3 -81 115 Left 0
    > WINDOW 123 0 0 Left 0
    > WINDOW 39 0 0 Left 0
    > SYMATTR InstName I1
    > SYMATTR Value SINE(0 1.414 50 0 0 0 200)
    > SYMBOL diode 48 176 R180
    > WINDOW 0 -23 0 Left 0
    > WINDOW 3 22 81 Left 0
    > SYMATTR InstName D1
    > SYMATTR Value MUR460
    > SYMBOL diode 144 176 R180
    > WINDOW 0 21 1 Left 0
    > WINDOW 3 24 60 Left 0
    > SYMATTR InstName D2
    > SYMATTR Value MUR460
    > SYMBOL diode 48 384 R180
    > WINDOW 0 -19 62 Left 0
    > WINDOW 3 24 6 Left 0
    > SYMATTR InstName D3
    > SYMATTR Value MUR460
    > SYMBOL diode 144 384 R180
    > WINDOW 0 23 61 Left 0
    > WINDOW 3 24 -13 Left 0
    > SYMATTR InstName D4
    > SYMATTR Value MUR460
    > SYMBOL cap 256 144 R0
    > SYMATTR InstName C1
    > SYMATTR Value 2.2E-4
    > SYMBOL res 256 256 R0
    > SYMATTR InstName R1
    > SYMATTR Value .1
    > SYMBOL res 416 208 R0
    > SYMATTR InstName R2
    > SYMATTR Value 400
    > SYMBOL res 256 400 R90
    > WINDOW 0 0 56 VBottom 0
    > WINDOW 3 32 56 VTop 0
    > SYMATTR InstName R3
    > SYMATTR Value .1
    > TEXT -226 506 Left 0 !.tran 0 1 .95


    Pspice I assume?

    It's 15 years ago at university that i did any of that in anger!

    I take it this is the circuit for a boost converter?

    I know there is a free vertion of Pspice, could this be inported into
    that, or has it too many nodes?

    Please help on draging me into 2008...!

    Thanks again,

    Reggie.
    reggie, Feb 24, 2008
    #13
  14. reggie

    legg Guest

    On Sun, 24 Feb 2008 13:48:48 -0800 (PST), reggie
    <> wrote:


    >Pspice I assume?
    >

    PSpice v4 courtesy of LT SWCadiii

    http://www.linear.com/designtools/software/#Spice

    >It's 15 years ago at university that i did any of that in anger!
    >
    >I take it this is the circuit for a boost converter?


    Simple current generator into a rectified and capacitively filtered
    resistive load.

    You know what the current waveshape is......

    Keep each problem as simple as possible.

    RL
    legg, Feb 24, 2008
    #14

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