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Re: Can somebody take a peek at this circuit for me?

 
 
Larry Brasfield
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Posts: n/a
 
      03-22-2005, 06:17 PM
"Michael Noone" <mnoone.uiuc.edu@127.0.0.1> wrote in message
news:Xns96217A2E8B647mnooneuiucedu127001@216.196.9 7.136...
> "Larry Brasfield" <(E-Mail Removed)> wrote in news:%
> TY%d.35$e%(E-Mail Removed):

....
Regarding circuit shown at:
https://netfiles.uiuc.edu/mnoone/www...ierwithfet.jpg
[Why the FET dies resolved.]

> OK then well now I'm just confused - how would you switch a very high
> voltage signal with a mosfet with a low voltage input?


To do that in a DC coupled manner with a ground
referenced load and a ground referenced controller
normally requires at least 1 more transistor, itself
having similar HV withstand. The process of getting
a signal from one voltage range to another is often
called "translating". A common base amplifier could
do it for your application.

And don't call it "switch" when you mean to drive
the FET so that it has varying transconductance.

> I thought one of the
> big ideas of fets was that you could take a small input voltage and switch
> a large input voltage - but that seems to not be right?


That has not been contravened here.

> Thanks,


You're welcome. I've set followups to sci.electronics.basics
because this kind of discussion is more topical there.

--
--Larry Brasfield
email: (E-Mail Removed)
Above views may belong only to me.


 
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Michael Noone
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Posts: n/a
 
      03-22-2005, 06:32 PM
"Larry Brasfield" <(E-Mail Removed)> wrote in
news:YiZ%d.45$e%(E-Mail Removed):

> "Michael Noone" <mnoone.uiuc.edu@127.0.0.1> wrote in message
> news:Xns96217A2E8B647mnooneuiucedu127001@216.196.9 7.136...
>> "Larry Brasfield" <(E-Mail Removed)> wrote in
>> news:% TY%d.35$e%(E-Mail Removed):

> ...
> Regarding circuit shown at:
> https://netfiles.uiuc.edu/mnoone/www...ierwithfet.jpg
> [Why the FET dies resolved.]
>
>> OK then well now I'm just confused - how would you switch a very high
>> voltage signal with a mosfet with a low voltage input?

>
> To do that in a DC coupled manner with a ground
> referenced load and a ground referenced controller
> normally requires at least 1 more transistor, itself
> having similar HV withstand. The process of getting
> a signal from one voltage range to another is often
> called "translating". A common base amplifier could
> do it for your application.


Could you reccomend a transistor that would be able to serve this
function? I've looked before for high voltage transistors and found very
little.

> And don't call it "switch" when you mean to drive
> the FET so that it has varying transconductance.


Well - actually I meant switch. Switching is the usage of mosfets that
I'm familiar with, using them to make a linear output is something I'm
not fully comfortable with just yet. I was asking in general, not about
the schematic that I posted.

>> I thought one of the
>> big ideas of fets was that you could take a small input voltage and
>> switch a large input voltage - but that seems to not be right?

>
> That has not been contravened here.
>
>> Thanks,

>
> You're welcome. I've set followups to sci.electronics.basics
> because this kind of discussion is more topical there.


So - once a high volage transistor is used to drive the gate, what else
do I need to change to make the circuit work? Best regards,

-M. Noone
 
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Larry Brasfield
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Posts: n/a
 
      03-22-2005, 07:47 PM
"Michael Noone" <mnoone.uiuc.edu@127.0.0.1> wrote in message
news:Xns96217F7D8C823mnooneuiucedu127001@216.196.9 7.136...
> "Larry Brasfield" <(E-Mail Removed)> wrote in
> news:YiZ%d.45$e%(E-Mail Removed):
>> "Michael Noone" <mnoone.uiuc.edu@127.0.0.1> wrote in message
>> news:Xns96217A2E8B647mnooneuiucedu127001@216.196.9 7.136...

....
>>> OK then well now I'm just confused - how would you switch a very high
>>> voltage signal with a mosfet with a low voltage input?

>>
>> To do that in a DC coupled manner with a ground
>> referenced load and a ground referenced controller
>> normally requires at least 1 more transistor, itself
>> having similar HV withstand. The process of getting
>> a signal from one voltage range to another is often
>> called "translating". A common base amplifier could
>> do it for your application.

>
> Could you reccomend a transistor that would be able to serve this
> function? I've looked before for high voltage transistors and found very
> little.


Go to www.onsemi.com and try again.

>> And don't call it "switch" when you mean to drive
>> the FET so that it has varying transconductance.

>
> Well - actually I meant switch. Switching is the usage of mosfets that
> I'm familiar with, using them to make a linear output is something I'm
> not fully comfortable with just yet. I was asking in general, not about
> the schematic that I posted.


In the context you used the word, it was inappropriate
and indicates, to people sharing the same language,
that you either misconceive the circuit or are not yet
familiar with what the word really means.

....
> So - once a high volage transistor is used to drive the gate, what else
> do I need to change to make the circuit work?


I would use this configuration:

VCC
+
.----)---.
| |
.-. .-.
| | | |
| | | |
'-' '-'
| |
| |
o-----||-+
| ||->
| ||-+
| |
| |
| o------.OUT
| | |
|| | | .-.
.-----||--. |/ | | |
| || | GND-| | | |
| | |> | '-'
___ | |\| | | | |
GND-|___|-o--|-\ | ___ | | GND
| >---o---|___|----o |
.--|+/ . |
| |/| | |
| GND-|<- |
| |
___ | ___ |
IN -|___|-o---------|___|-----------------'
(created by AACircuit v1.28.4 beta 13/12/04 www.tech-chat.de)

You can set the resistors associated with the FET to
control loop gain while setting the emitter resistor
to limit the max gate drive. The response will tend
to be stable if you do not set the power amp stage
gain too high and make the integrator feedback
network pole in about the same place that the
power amp stage has its lowest frequency pole.
It inverts, so if your heart is set on the transfer
function you posted, you'll need to adjust.

I still think you need to

--
--Larry Brasfield
email: (E-Mail Removed)
Above views may belong only to me.


 
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John Fields
Guest
Posts: n/a
 
      03-22-2005, 07:57 PM
On Tue, 22 Mar 2005 12:32:16 -0600, Michael Noone
<mnoone.uiuc.edu@127.0.0.1> wrote:

>"Larry Brasfield" <(E-Mail Removed)> wrote in
>news:YiZ%d.45$e%(E-Mail Removed):
>
>> "Michael Noone" <mnoone.uiuc.edu@127.0.0.1> wrote in message
>> news:Xns96217A2E8B647mnooneuiucedu127001@216.196.9 7.136...
>>> "Larry Brasfield" <(E-Mail Removed)> wrote in
>>> news:% TY%d.35$e%(E-Mail Removed):

>> ...
>> Regarding circuit shown at:
>> https://netfiles.uiuc.edu/mnoone/www...ierwithfet.jpg
>> [Why the FET dies resolved.]
>>
>>> OK then well now I'm just confused - how would you switch a very high
>>> voltage signal with a mosfet with a low voltage input?

>>
>> To do that in a DC coupled manner with a ground
>> referenced load and a ground referenced controller
>> normally requires at least 1 more transistor, itself
>> having similar HV withstand. The process of getting
>> a signal from one voltage range to another is often
>> called "translating". A common base amplifier could
>> do it for your application.

>
>Could you reccomend a transistor that would be able to serve this
>function? I've looked before for high voltage transistors and found very
>little.
>
>> And don't call it "switch" when you mean to drive
>> the FET so that it has varying transconductance.

>
>Well - actually I meant switch. Switching is the usage of mosfets that
>I'm familiar with, using them to make a linear output is something I'm
>not fully comfortable with just yet. I was asking in general, not about
>the schematic that I posted.
>
>>> I thought one of the
>>> big ideas of fets was that you could take a small input voltage and
>>> switch a large input voltage - but that seems to not be right?

>>
>> That has not been contravened here.
>>
>>> Thanks,

>>
>> You're welcome. I've set followups to sci.electronics.basics
>> because this kind of discussion is more topical there.

>
>So - once a high volage transistor is used to drive the gate, what else
>do I need to change to make the circuit work? Best regards,


---

+400V>--+-----+---D S---+----------+-------->>--+
| | G | | |
| | | [ZENER] | |
[R1] [R2] | |K | |
| | +-----+ | |
| | | | |
| +-----+ | |
| | | |
+-------------------+ Vin [R2] |
| | | | | |
| D /-|--+ | [RL]
|K G---< | | |
[REF] S \+|-------+-----+ |
| | | | | |
| | | [R3] [C1] |
| | | | | |
GND>----+-----------+-------+--------+-----+-->>--+


Use a little high-voltage FET to drive the big FET's gate. They're
cheap and it doesn't take much (damn near nothing) to drive them. Use
a micropower opamp and you can get its supply voltage from a resistor
and a low-current shunt reference tied to the 400V rail (or even just
a resistive divider) The Zener is to make sure the big MOSFET's gate
voltage never goes higher than it's supposed to, WRT to the source,
R2 R3 is the 40:1 divider, and C1 is to keep the thing from
oscillating.

--
John Fields
 
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Larry Brasfield
Guest
Posts: n/a
 
      03-22-2005, 08:37 PM
"John Fields" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed)...
> On Tue, 22 Mar 2005 12:32:16 -0600, Michael Noone
> <mnoone.uiuc.edu@127.0.0.1> wrote:

....
> +400V>--+-----+---D S---+----------+-------->>--+
> | | G | | |
> | | | [ZENER] | |
> [R1] [R2] | |K | |
> | | +-----+ | |
> | | | | |
> | +-----+ | |
> | | | |
> +-------------------+ Vin [R2] |
> | | | | | |
> | D /-|--+ | [RL]
> |K G---< | | |
> [REF] S \+|-------+-----+ |
> | | | | | |
> | | | [R3] [C1] |
> | | | | | |
> GND>----+-----------+-------+--------+-----+-->>--+
>
>
> Use a little high-voltage FET to drive the big FET's gate. They're
> cheap and it doesn't take much (damn near nothing) to drive them. Use
> a micropower opamp and you can get its supply voltage from a resistor
> and a low-current shunt reference tied to the 400V rail (or even just
> a resistive divider) The Zener is to make sure the big MOSFET's gate
> voltage never goes higher than it's supposed to, WRT to the source,
> R2 R3 is the 40:1 divider, and C1 is to keep the thing from
> oscillating.


It cannot oscillate no matter what value you use for C1.
Study it carefully and I'm sure you can see why.

--
--Larry Brasfield
email: (E-Mail Removed)
Above views may belong only to me.


 
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Larry Brasfield
Guest
Posts: n/a
 
      03-22-2005, 08:50 PM
"John Fields" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed)...
> +400V>--+-----+---D S---+----------+-------->>--+
> | | G | | |
> | | | [ZENER] | |
> [R1] [R2] | |K | |
> | | +-----+ | |
> | | | | |
> | +-----+ | |
> | | | |
> +-------------------+ Vin [R2] |
> | | | | | |
> | D /-|--+ | [RL]
> |K G---< | | |
> [REF] S \+|-------+-----+ |
> | | | | | |
> | | | [R3] [C1] |
> | | | | | |
> GND>----+-----------+-------+--------+-----+-->>--+
>
>
> Use a little high-voltage FET to drive the big FET's gate. They're
> cheap and it doesn't take much (damn near nothing) to drive them. Use
> a micropower opamp and you can get its supply voltage from a resistor
> and a low-current shunt reference tied to the 400V rail (or even just
> a resistive divider) The Zener is to make sure the big MOSFET's gate
> voltage never goes higher than it's supposed to, WRT to the source,
> R2 R3 is the 40:1 divider, and C1 is to keep the thing from
> oscillating.


What do you think the maximum output will be and
how does that compare with the "requirement"?

Would you increase C1 until it formed the dominant
pole in that loop?

Where do think that would be, considering where the
the previously dominant pole is (likely to be)?

How much loop gain variation would you expect to
see as the operating point changes?

--
--Larry Brasfield
email: (E-Mail Removed)
Above views may belong only to me.


 
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Michael Noone
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Posts: n/a
 
      03-22-2005, 10:09 PM
"Larry Brasfield" <(E-Mail Removed)> wrote in
news:8D_%d.51$e%(E-Mail Removed):

> Go to www.onsemi.com and try again.


OK - well I'm not entirely sure what I should be looking for, so I just
looked for a high voltage NPN BJT, and found this:
http://www.onsemi.com/pub/Collateral/MPSA44-D.PDF - Is that what you
were describing?


>> So - once a high volage transistor is used to drive the gate, what

else
>> do I need to change to make the circuit work?

>
> I would use this configuration:
>
> VCC
> +
> .----)---.
> | |
> .-. .-.
> | | | |
> | | | |
> '-' '-'
> | |
> | |
> o-----||-+
> | ||->
> | ||-+
> | |
> | |
> | o------.OUT
> | | |
> || | | .-.
> .-----||--. |/ | | |
> | || | GND-| | | |
> | | |> | '-'
> ___ | |\| | | | |
> GND-|___|-o--|-\ | ___ | | GND
> | >---o---|___|----o |
> .--|+/ . |
> | |/| | |
> | GND-|<- |
> | |
> ___ | ___ |
> IN -|___|-o---------|___|-----------------'
> (created by AACircuit v1.28.4 beta 13/12/04 www.tech-chat.de)
>
> You can set the resistors associated with the FET to
> control loop gain while setting the emitter resistor
> to limit the max gate drive. The response will tend
> to be stable if you do not set the power amp stage
> gain too high and make the integrator feedback
> network pole in about the same place that the
> power amp stage has its lowest frequency pole.
> It inverts, so if your heart is set on the transfer
> function you posted, you'll need to adjust.
>
> I still think you need to


Correct me if I'm completely wrong [I probabaly am ] - but to me it
looks like The input could get stuck sinking a decent amount of current.
The input to this circuit is coming from a very low current (I think
about 2ma max or so) DAC board, so that needs to be avoided. I guess I'd
just buffer the input if that is the case - but I thought I should ask
to be sure.

Also - I'm having alot of difficulty figuring out what exactly is
happening in this circuit. To me - it looks like the output from the op-
amp just goes through a resistor and is then grounded. It's as if the
output form the op-amp pretty much doesn't do anything at all.
Similarly, it looks like both the base and the emitter of the transistor
are grounded, which again seems odd. Maybe I'm misunderstanding the
circuit? To me it looks like the node connecting the resistor on the
output of the op-amp and the emitter of the bjt is grounded, but maybe
I'm wrong?

Thanks for all your help, and for putting up with all my questions

-Michael
 
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John Fields
Guest
Posts: n/a
 
      03-22-2005, 11:22 PM
On Tue, 22 Mar 2005 12:37:39 -0800, "Larry Brasfield"
<(E-Mail Removed)> wrote:

>"John Fields" <(E-Mail Removed)> wrote in message
> news:(E-Mail Removed)...
>> On Tue, 22 Mar 2005 12:32:16 -0600, Michael Noone
>> <mnoone.uiuc.edu@127.0.0.1> wrote:

>...
>> +400V>--+-----+---D S---+----------+-------->>--+
>> | | G | | |
>> | | | [ZENER] | |
>> [R1] [R2] | |K | |
>> | | +-----+ | |
>> | | | | |
>> | +-----+ | |
>> | | | |
>> +-------------------+ Vin [R2] |
>> | | | | | |
>> | D /-|--+ | [RL]
>> |K G---< | | |
>> [REF] S \+|-------+-----+ |
>> | | | | | |
>> | | | [R3] [C1] |
>> | | | | | |
>> GND>----+-----------+-------+--------+-----+-->>--+
>>
>>
>> Use a little high-voltage FET to drive the big FET's gate. They're
>> cheap and it doesn't take much (damn near nothing) to drive them. Use
>> a micropower opamp and you can get its supply voltage from a resistor
>> and a low-current shunt reference tied to the 400V rail (or even just
>> a resistive divider) The Zener is to make sure the big MOSFET's gate
>> voltage never goes higher than it's supposed to, WRT to the source,
>> R2 R3 is the 40:1 divider, and C1 is to keep the thing from
>> oscillating.

>
>It cannot oscillate no matter what value you use for C1.
>Study it carefully and I'm sure you can see why.


---
Typical behavior for you. As the erroree, when you find what you
think is an error, instead of simply stating what you think it is that
makes it an error, you hold back and try to get some mileage out of it
by requiring a lot of work to be done by whom you consider to be the
errorer.

In this case, good catch, but... the larger C1 becomes, the greater
the output ripple becomes, until it starts to look like an
oscillation. The best C1 is no C1, according to bitethedust.asc which
you can find on abse and which you can run if you've downloaded
LTSPICE

--
John Fields
 
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Larry Brasfield
Guest
Posts: n/a
 
      03-22-2005, 11:57 PM
"John Fields" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed)...
> On Tue, 22 Mar 2005 12:37:39 -0800, "Larry Brasfield"
> <(E-Mail Removed)> wrote:
>
>>"John Fields" <(E-Mail Removed)> wrote in message
>> news:(E-Mail Removed)...
>>> On Tue, 22 Mar 2005 12:32:16 -0600, Michael Noone
>>> <mnoone.uiuc.edu@127.0.0.1> wrote:

>>...
>>> +400V>--+-----+---D S---+----------+-------->>--+
>>> | | G | | |
>>> | | | [ZENER] | |
>>> [R1] [R2] | |K | |
>>> | | +-----+ | |
>>> | | | | |
>>> | +-----+ | |
>>> | | | |
>>> +-------------------+ Vin [R2] |
>>> | | | | | |
>>> | D /-|--+ | [RL]
>>> |K G---< | | |
>>> [REF] S \+|-------+-----+ |
>>> | | | | | |
>>> | | | [R3] [C1] |
>>> | | | | | |
>>> GND>----+-----------+-------+--------+-----+-->>--+
>>>
>>>
>>> Use a little high-voltage FET to drive the big FET's gate. They're
>>> cheap and it doesn't take much (damn near nothing) to drive them. Use
>>> a micropower opamp and you can get its supply voltage from a resistor
>>> and a low-current shunt reference tied to the 400V rail (or even just
>>> a resistive divider) The Zener is to make sure the big MOSFET's gate
>>> voltage never goes higher than it's supposed to, WRT to the source,
>>> R2 R3 is the 40:1 divider, and C1 is to keep the thing from
>>> oscillating.

>>
>>It cannot oscillate no matter what value you use for C1.
>>Study it carefully and I'm sure you can see why.

>
> ---
> Typical behavior for you. As the erroree, when you find what you
> think is an error, instead of simply stating what you think it is that
> makes it an error, you hold back and try to get some mileage out of it
> by requiring a lot of work to be done by whom you consider to be the
> errorer.


The post you quoted is one I canceled a couple of
minutes after hitting send. I mistakenly read your
upper MOSFET as a reversed P-channel device,
assuming, incorrectly, that you intended to produce
the 400V output first mentioned by the OP. As I
was reading your schematic, filling in the missing
polarity, it looked like a bistable latch. And if that
was what you had drawn, (or meant to draw), it
would have taken little time to spot it.

> In this case, good catch, but... the larger C1 becomes, the greater
> the output ripple becomes, until it starts to look like an
> oscillation. The best C1 is no C1, according to bitethedust.asc which
> you can find on abse and which you can run if you've downloaded
> LTSPICE


I'm game. It's not showing up on my newserver
in alt.binaries.schematics.electronic . Can you
either email it or state what part values and
transistors you used? Or post, the .asc, which
is ASCII, so can be pasted into a post.

I presume your comments apply to my post of
12:50, where I asked about loop gain shifts
and dominant poles. Since you elect to not
answer that, I want to simulate your circuit
and see for myself.

Where did the output ripple come from? I can
see no source for it in your schematic other
than an oscillation. I'm about 95% confidant
that it will oscillate until C1 becomes huge.
The only question is where the limiting occurs.

--
--Larry Brasfield
email: (E-Mail Removed)
Above views may belong only to me.


 
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Genome
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Posts: n/a
 
      03-23-2005, 12:18 AM

"John Fields" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed)...
> On Tue, 22 Mar 2005 12:37:39 -0800, "Larry Brasfield"
> <(E-Mail Removed)> wrote:
>
> >"John Fields" <(E-Mail Removed)> wrote in message
> > news:(E-Mail Removed)...
> >> On Tue, 22 Mar 2005 12:32:16 -0600, Michael Noone
> >> <mnoone.uiuc.edu@127.0.0.1> wrote:

> >...
> >> +400V>--+-----+---D S---+----------+-------->>--+
> >> | | G | | |
> >> | | | [ZENER] | |
> >> [R1] [R2] | |K | |
> >> | | +-----+ | |
> >> | | | | |
> >> | +-----+ | |
> >> | | | |
> >> +-------------------+ Vin [R2] |
> >> | | | | | |
> >> | D /-|--+ | [RL]
> >> |K G---< | | |
> >> [REF] S \+|-------+-----+ |
> >> | | | | | |
> >> | | | [R3] [C1] |
> >> | | | | | |
> >> GND>----+-----------+-------+--------+-----+-->>--+
> >>
> >>
> >> Use a little high-voltage FET to drive the big FET's gate.

They're
> >> cheap and it doesn't take much (damn near nothing) to drive them.

Use
> >> a micropower opamp and you can get its supply voltage from a

resistor
> >> and a low-current shunt reference tied to the 400V rail (or even

just
> >> a resistive divider) The Zener is to make sure the big MOSFET's

gate
> >> voltage never goes higher than it's supposed to, WRT to the

source,
> >> R2 R3 is the 40:1 divider, and C1 is to keep the thing from
> >> oscillating.

> >
> >It cannot oscillate no matter what value you use for C1.
> >Study it carefully and I'm sure you can see why.

>
> ---
> Typical behavior for you. As the erroree, when you find what you
> think is an error, instead of simply stating what you think it is

that
> makes it an error, you hold back and try to get some mileage out of

it
> by requiring a lot of work to be done by whom you consider to be the
> errorer.
>
> In this case, good catch, but... the larger C1 becomes, the greater
> the output ripple becomes, until it starts to look like an
> oscillation. The best C1 is no C1, according to bitethedust.asc

which
> you can find on abse and which you can run if you've downloaded
> LTSPICE
>
> --
> John Fields


John, that is **** poor. Whilst Larry might not have the bananas to
tell you why he will probably sweat buckets coming up with some
'reasons'. You have done yourself and Spice a big unfavour.

DNA



 
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