Electronics Forums > continuous mode,current mode control, boost circuit

# continuous mode,current mode control, boost circuit

reggie
Guest
Posts: n/a

 02-16-2008, 02:46 PM
Hi All,

I am trying to understand the operation of a ML4824 Boost circuit
operating in continuous mode using current mode control.

I wanted to draw the critical voltage and current waveforms at each
point through the circuit. Thus am trying to plot the ripple voltage
across a boost capacitor with respect to the input full wave rectified
100Hz voltage in steady state conditions.

How could I work out the frequency, phase and magnitude of this ripple
with respect to the input voltage to the circuit?

Could someone please point me in the correct direction?
Thanks,

Reggie.

Author reggie

legg
Guest
Posts: n/a

 02-16-2008, 10:30 PM
On Sat, 16 Feb 2008 06:46:35 -0800 (PST), reggie
<(E-Mail Removed)> wrote:

>Hi All,
>
>I am trying to understand the operation of a ML4824 Boost circuit
>operating in continuous mode using current mode control.
>
>I wanted to draw the critical voltage and current waveforms at each
>point through the circuit. Thus am trying to plot the ripple voltage
>across a boost capacitor with respect to the input full wave rectified
>100Hz voltage in steady state conditions.
>
>How could I work out the frequency, phase and magnitude of this ripple
>with respect to the input voltage to the circuit?
>
>Could someone please point me in the correct direction?
>Thanks,
>

I think you're looking for Fairchild AN42045, which is a re-issue of
Microlinear's AN-34. Formulas and scoped illustrations are provided on
pages 4 and 6.

RL

reggie
Guest
Posts: n/a

 02-19-2008, 05:03 PM
On 16 Feb, 22:30, legg <(E-Mail Removed)> wrote:
> On Sat, 16 Feb 2008 06:46:35 -0800 (PST), reggie
>
>
>
>
>
> <(E-Mail Removed)> wrote:
> >Hi All,

>
> >I am trying to understand the operation of a ML4824 Boost circuit
> >operating in continuous mode using current mode control.

>
> >I wanted to draw the critical voltage and current waveforms at each
> >point through the circuit. Thus am trying to plot the ripple voltage
> >across a boost capacitor with respect to the input full wave rectified
> >100Hz voltage in steady state conditions.

>
> >How could I work out the frequency, phase and magnitude of this ripple
> >with respect to the input voltage to the circuit?

>
> >Could someone please point me in the correct direction?
> >Thanks,

>
> I think you're looking for Fairchild AN42045, which is a re-issue of
> Microlinear's AN-34. Formulas and scoped illustrations are provided on
> pages 4 and 6.
>
> RL- Hide quoted text -
>
> - Show quoted text -

Thanks Leg,

this application note, but I couldn't remember where I had seen it. I
am currently berried under a mass of printed application noted and my
favorites folder is about to explode!

What I was after is an idiots guide to the operation of the gain
modulator.

I think if I understand this in context of the whole controller I
should be able to work out the magnitude and phase of the ripple
voltage on the boost cap.

I in effect want to understand how the ripple is produced, not just to
assume it's the shape of the waveform in the application note.

I don't understand:

a) the phase relationship between the mains sine wave and the boost
ripple voltage
b) the amplitude of the ripple due to the boost circuit (however know
the ESR of the capacitor has an in pact on this)
c) how to derive/understand the equation Igain=(Iac*veao)/Vrms^2

I hope I have explained myself clearly enough and outlined what I am
trying to do,

Hope someone can point me in the correct direction,

Regards,

Reggie

reggie
Guest
Posts: n/a

 02-21-2008, 09:00 PM
On 19 Feb, 17:03, reggie <(E-Mail Removed)> wrote:
> On 16 Feb, 22:30, legg <(E-Mail Removed)> wrote:
>
>
>
>
>
> > On Sat, 16 Feb 2008 06:46:35 -0800 (PST), reggie

>
> > <(E-Mail Removed)> wrote:
> > >Hi All,

>
> > >I am trying to understand the operation of a ML4824 Boost circuit
> > >operating in continuous mode using current mode control.

>
> > >I wanted to draw the critical voltage and current waveforms at each
> > >point through the circuit. Thus am trying to plot the ripple voltage
> > >across a boost capacitor with respect to the input full wave rectified
> > >100Hz voltage in steady state conditions.

>
> > >How could I work out the frequency, phase and magnitude of this ripple
> > >with respect to the input voltage to the circuit?

>
> > >Could someone please point me in the correct direction?
> > >Thanks,

>
> > I think you're looking for Fairchild AN42045, which is a re-issue of
> > Microlinear's AN-34. Formulas and scoped illustrations are provided on
> > pages 4 and 6.

>
> > RL- Hide quoted text -

>
> > - Show quoted text -

>
> Thanks Leg,
>
> Thanks for your information, I had seen somewhere the waveforms in
> this application note, but I couldn't remember where I had seen it. I
> am currently berried under a mass of printed application noted and my
> favorites folder is about to explode!
>
> What I was after is an idiots guide to the operation of the gain
> modulator.
>
> I think if I understand this in context of the whole controller I
> should be able to work out the magnitude and phase of the ripple
> voltage on the boost cap.
>
> I in effect want to understand how the ripple is produced, not just to
> assume it's the shape of the waveform in the application note.
>
> I don't understand:
>
> a) * * *the phase relationship between the mains sine wave and the boost
> ripple voltage
> b) * * *the amplitude of the ripple due to the boost circuit (however know
> the ESR of the capacitor has an in pact on this)
> c) * * *how to derive/understand the equation Igain=(Iac*veao)/Vrms^2
>
> I hope I have explained myself clearly enough and outlined what I am
> trying to do,
>
> Hope someone can point me in the correct direction,
>
> Regards,
>
> Reggie- Hide quoted text -
>
> - Show quoted text -

anyone,

any ideas?

I am stuck!

reggie,

legg
Guest
Posts: n/a

 02-21-2008, 09:59 PM
On Tue, 19 Feb 2008 09:03:47 -0800 (PST), reggie
<(E-Mail Removed)> wrote:

>I in effect want to understand how the ripple is produced, not just to
>assume it's the shape of the waveform in the application note.
>
>I don't understand:
>
>a) the phase relationship between the mains sine wave and the boost
>ripple voltage

The pfc is designed to draw sinusoidal currents from the line. The LF
ripple voltage on the LF bulk caps can be assumed to be 120Hz lagging.

>b) the amplitude of the ripple due to the boost circuit (however know
>the ESR of the capacitor has an in pact on this)

HF ripple current is created by both the boost source and any HF
switched load. The resulting voltage depends on extent of HF
decoupling and degree of synchronization attempted.

>c) how to derive/understand the equation Igain=(Iac*veao)/Vrms^2

I'd have to know where the formula is pulled from before attempting to
figure out what the author intended to convey. Igain, by itself, has
no inherent meaning or sense.

RL

reggie
Guest
Posts: n/a

 02-22-2008, 09:04 PM
On 21 Feb, 21:59, legg <(E-Mail Removed)> wrote:
> On Tue, 19 Feb 2008 09:03:47 -0800 (PST), reggie
>
> <(E-Mail Removed)> wrote:
> >I in effect want to understand how the ripple is produced, not just to
> >assume it's the shape of the waveform in the application note.

>
> >I don't understand:

>
> >a) the phase relationship between the mains sine wave and the boost
> >ripple voltage

>
> The pfc is designed to draw sinusoidal currents from the line. The LF
> ripple voltage on the LF bulk caps can be assumed to be 120Hz lagging.
>
> >b) the amplitude of the ripple due to the boost circuit (however know
> >the ESR of the capacitor has an in pact on this)

>
> HF ripple current is created by both the boost source and any HF
> switched load. The resulting voltage depends on extent of HF
> decoupling and degree of synchronization attempted.
>
> >c) how to derive/understand the equation Igain=(Iac*veao)/Vrms^2

>
> I'd have to know where the formula is pulled from before attempting to
> figure out what the author intended to convey. Igain, by itself, has
> no inherent meaning or sense.
>
> RL

> The LF ripple voltage on the LF bulk caps can be
> assumed to be 120Hz lagging.

It's 100Hz over hear in the UK. I understand that it is the same
frequency as the rectified mains, but I don't understand how this
frequency ends up on the boost cap.
How does it get from the rectified mains to being ripple superimposed
on the DC boost capacitor?

I think it is something to do with the modulation stage of the chip
(in my case an ML4824 combo PFC and Forward controller). It takes the
boost voltage and in effect injects a current into the gain modulator
(pin2 = Iac). I think this is to sample the input current as so it can
make the input current in phase with the input voltage.

This may be a silly question, is the phase lag on the ripple current
caused by a propagation delay thought the chip?

> HF ripple current is created by both the boost source and any HF
> switched load. The resulting voltage depends on extent of HF
> decoupling and degree of synchronization attempted.

Understand.

Hear is a link to the datasheet of the controller:

http://www.fairchildsemi.com/pf/ML/ML4824-1.html
or
http://www.fairchildsemi.com/ds/ML/ML4824-1.pdf

Equation on page 8
Igain=(Iac*veao)/Vrms^2
How would you derive this equation?

I understand that the squared element is a linearization trick, but
cannot seem to grasp the rest.

Hope I am making sense.

Reggie

legg
Guest
Posts: n/a

 02-22-2008, 11:58 PM
On Fri, 22 Feb 2008 13:04:13 -0800 (PST), reggie
<(E-Mail Removed)> wrote:

>> The LF ripple voltage on the LF bulk caps can be
>> assumed to be 120Hz lagging.

>
>It's 100Hz over hear in the UK. I understand that it is the same
>frequency as the rectified mains, but I don't understand how this
>frequency ends up on the boost cap.
>How does it get from the rectified mains to being ripple superimposed
>on the DC boost capacitor?
>
>I think it is something to do with the modulation stage of the chip
>(in my case an ML4824 combo PFC and Forward controller). It takes the
>boost voltage and in effect injects a current into the gain modulator
>(pin2 = Iac). I think this is to sample the input current as so it can
>make the input current in phase with the input voltage.
>
>This may be a silly question, is the phase lag on the ripple current
>caused by a propagation delay thought the chip?

No. .A capacitor's voltage changes under the relationship

dv = Ic / C

dv = rate of voltage change (volts / second)
Ic = dq/dt = capacitor current (amps)

A simple sinusoidal current will produce it's integral - a cosine -
a similar waveshape delayed 90 degrees.

Complex current waveforms produce complex voltages with identical spot
harmonic content and varying harmonic amplitude (1/f) that are delayed
individually by their own frequency-related 90 degrees shifts.

Becouse the bulk of the current is at double the line frequency, this
double frequency shows up on the LF filter caps.

These are pretty basic concepts covered in most basic electronics
texts.

>
>> HF ripple current is created by both the boost source and any HF
>> switched load. The resulting voltage depends on extent of HF
>> decoupling and degree of synchronization attempted.

>
>Understand.
>
>Hear is a link to the datasheet of the controller:
>
>http://www.fairchildsemi.com/pf/ML/ML4824-1.html
>or
>http://www.fairchildsemi.com/ds/ML/ML4824-1.pdf
>
>Equation on page 8
>Igain=(Iac*veao)/Vrms^2
>How would you derive this equation?
>
>I understand that the squared element is a linearization trick, but
>cannot seem to grasp the rest.

Igainmod = [ ( Iac*veao ) / Vrms^2 ] x 1V

- Igainmod refers to the output current forced by the modulator into
pin #3 of the IC.

- Iac refers to the current forced into IC pin#2.

- Veao refers to the voltage produced on pin16 by the internal voltage
error amplifier, in response to the HVDC divider connected to input
pin15 as is differs from the internal reference of 2V5.

- Vrms refers to the voltage input at pin 4 - a voltage related to the
rectified sinusoidal input for which a related linear current is
required for unity power factor. It should probably be labeled 'Vform'
or Vin, or something else less potentially confusing.

- 1V is a scaling factor to produce a chip output current in amps.

This is a formula that only applies to this IC in the manner
illustrated in this diagram. Why the term 1/Vrms^2, or 1/Vform^2?
I have to assume it's a 'linearizing' factor introduced to produce a
wider dynamic range in the circuit.

What is not evident or included in this formula is the effect of the
resistor in series with pin3 - the Isense pin carrying Igainmod..

Voltage developed by the sensed current is expected to be negative,
sucking current that the multiplier produces from pin3 - for a zero
voltage internal null.

I assume that the external/internal resistor values are specified in
the standard spec or operating diagrams. Notes on page 8 indicate only
that if the pin itself is pulled a volt below ground, the output
modulation is inhibited (by circuitry not illustrated here), rather
than allowing increased multiplier current to compensate the 'large'
current sensing voltage - the normal function.

RL

legg
Guest
Posts: n/a

 02-23-2008, 03:23 AM
On Fri, 22 Feb 2008 18:58:20 -0500, legg <(E-Mail Removed)> wrote:

Should be dv/dt rather than dv below

>No. .A capacitor's voltage changes under the relationship
>
> dv = Ic / C
>
>dv = rate of voltage change (volts / second)
>Ic = dq/dt = capacitor current (amps)
>
>A simple sinusoidal current will produce it's integral - a cosine -
>a similar waveshape delayed 90 degrees.
>
>Complex current waveforms produce complex voltages with identical spot
>harmonic content and varying harmonic amplitude (1/f) that are delayed
>individually by their own frequency-related 90 degrees shifts.
>
>Becouse the bulk of the current is at double the line frequency, this
>double frequency shows up on the LF filter caps.
>
>These are pretty basic concepts covered in most basic electronics
>texts.
>
>>
>>> HF ripple current is created by both the boost source and any HF
>>> switched load. The resulting voltage depends on extent of HF
>>> decoupling and degree of synchronization attempted.

>>
>>Understand.
>>
>>Hear is a link to the datasheet of the controller:
>>
>>http://www.fairchildsemi.com/pf/ML/ML4824-1.html
>>or
>>http://www.fairchildsemi.com/ds/ML/ML4824-1.pdf
>>
>>Equation on page 8
>>Igain=(Iac*veao)/Vrms^2
>>How would you derive this equation?
>>
>>I understand that the squared element is a linearization trick, but
>>cannot seem to grasp the rest.

>
>
>Igainmod = [ ( Iac*veao ) / Vrms^2 ] x 1V
>

<snip>

>This is a formula that only applies to this IC in the manner
>illustrated in this diagram. Why the term 1/Vrms^2, or 1/Vform^2?
>I have to assume it's a 'linearizing' factor introduced to produce a
>wider dynamic range in the circuit.

Obviously Vrms shows up in the denominator, as the current requirement
(and hopefully the current limit should reduce as the line voltage
increases, for a constant output power.

I could see this might be raised to an exponent of some kind only if
the current being sensed was a peak value with low continuity. That's
not the case here.

RL

reggie
Guest
Posts: n/a

 02-23-2008, 05:21 PM
On 23 Feb, 03:23, legg <(E-Mail Removed)> wrote:
> On Fri, 22 Feb 2008 18:58:20 -0500, legg <(E-Mail Removed)> wrote:
>
> Should be dv/dt rather than dv below
>
>
>
>
>
> >No. .A capacitor's voltage changes under the relationship

>
> > dv = Ic / C

>
> >dv = rate of voltage change (volts / second)
> >Ic = dq/dt = capacitor current (amps)

>
> >A simple sinusoidal current will produce it's integral - a cosine -
> >a similar waveshape delayed 90 degrees.

>
> >Complex current waveforms produce complex voltages with identical spot
> >harmonic content and varying harmonic amplitude (1/f) that are delayed
> >individually by their own frequency-related 90 degrees shifts.

>
> >Becouse the bulk of the current is at double the line frequency, this
> >double frequency shows up on the LF filter caps.

>
> >These are pretty basic concepts covered in most basic electronics
> >texts.

>
> >>> HF ripple current is created by both the boost source and any HF
> >>> switched load. The resulting voltage depends on extent of HF
> >>> decoupling and degree of synchronization attempted.

>
> >>Understand.

>
> >>Hear is a link to the datasheet of the controller:

>
> >>http://www.fairchildsemi.com/pf/ML/ML4824-1.html
> >>or
> >>http://www.fairchildsemi.com/ds/ML/ML4824-1.pdf

>
> >>Equation on page 8
> >>Igain=(Iac*veao)/Vrms^2
> >>How would you derive this equation?

>
> >>I understand that the squared element is a linearization trick, but
> >>cannot seem to grasp the rest.

>

>
> >Igainmod = [ ( Iac*veao ) / Vrms^2 ] x 1V

>
> <snip>
>
> >This is a formula that only applies to this IC in the manner
> >illustrated in this diagram. Why the term 1/Vrms^2, or 1/Vform^2?
> >I have to assume it's a 'linearizing' factor introduced to produce a
> >wider dynamic range in the circuit.

>
> Obviously Vrms shows up in the denominator, as the current requirement
> (and hopefully the current limit should reduce as the line voltage
> increases, for a constant output power.
>
> I could see this might be raised to an exponent of some kind only if
> the current being sensed was a peak value with low continuity. That's
> not the case here.
>
> RL- Hide quoted text -
>
> - Show quoted text -

Sorry I'm being a bit slow, and probably not seeing the wood for the
trees.

I understand that there will be phase shifts approaching 90 deg (ESR
makes it not quite 90 deg) because it's a capacitor and basic AC
theory, but the chip is simulating this effect to the line, not the
components themselves, otherwise you wouldn't need the chip. The ac
circuit theory can be used between input and output because the chip
does such a good job of that simulation. What I am trying to find out
is how to plot the mains sinewave input voltage against ripple voltage
using the chips algorithm.

Why does a full wave rectified waveform, turns into what looks like a
good sinewave? This waveform is what is confusing me. I think it is
too pure to be power parasitic elements and have a hunch that it's
something to do with the control chip. I may be wrong it won't be the
first time!

I think this formula is the key.

Igainmod = [ ( Iac*veao ) / Vrms^2 ] x 1V

How in words does this help to achieve unity power factor?

>Obviously Vrms shows up in the denominator, as the current requirement
>(and hopefully the current limit should reduce as the line voltage
>increases, for a constant output power.

Doesn't the current sense pin do this function by scaling the output
of the modulator signal? This chip has a cycle by cycle current limit
and thus power limit and in any case this Vrms provides a long term
voltage signal as it's slow, because it's heavily filtered.

From what I understand (limited I know) Pin 2 Iac is the instantaneous
input current and is bouncing up and down in a full wave rectified
kind of way. This signal provides an accurate scaled current, so the
chip has a reference to which it can use to draw current in phase
with.

Iac is then modulated with the voltage loops error signal (probably to
inject output voltage level information and provide some line phase
information to the signal at that point), in effect providing a
reference for the current error loop.

Isn't the 1/Vrms^2 term to provide feed forward to keep the slow
voltage control loop from having to react to changes in line voltage?

I'm not too clear yet and need to find an explanation in words for how
this form of active PFC works. I don't think the description in the
document from the manufacturer fully explains the equation above.

I need waveforms!!

Any ideas?

Confused Reggie...

legg
Guest
Posts: n/a

 02-23-2008, 10:13 PM
On Sat, 23 Feb 2008 09:21:03 -0800 (PST), reggie
<(E-Mail Removed)> wrote:

>Why does a full wave rectified waveform, turns into what looks like a
>good sinewave? This waveform is what is confusing me. I think it is
>too pure to be power parasitic elements and have a hunch that it's
>something to do with the control chip. I may be wrong it won't be the
>first time!
>

I recall being somewhat perplexed at seeing what apparently was a
fairly cleen sinusoid myself, a decade or so ago. However the waveform
or my perplexity prevented the timely production of useful and
reliable hardware.

The old unitrode U-134 by Philip Todd has some theoretical waveforms
for you, with competent labeling for LF voltage, current and power.:

http://focus.ti.com/lit/an/slua144/slua144.pdf

As far as PFC methods and formulas go, these are many and varied,
making interesting reading, when you've got the time and inclination
to do so.

The eferenced app note applies to the 3854, a much more widely used
device with similar control inputs and design method.

The only MicroLinear PFC chip I ever directly encountered was the
ML4812, which, in it's initial release, had the annoying habit of
going inependantly active high on its mosfet driver output, at the
time of shutdown UVLO, for a period dependent upon the discharge time
of any capacitors that might be hanging on it's reference pin for
simple decoupling purposes. I believe they fixed that, eventually, but
it came as a surpise at the time, particularly in buck PFC
applications.

I think I've used a MicroLinear 8pin PFC/PWM combo controller since,
without too much trouble, except there still seemed to be issues with
supply consumption in and around the UVLO thresholds.

>
>I need waveforms!!
>
>Any ideas?

Make some.

RL

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